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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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b1082dfd61
Add "ops" style method for using SDI functionality. Ops style calls will allow us to have arbitrarily long display pipelines, where each entity can call ops in the previous display entity. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
483 lines
10 KiB
C
483 lines
10 KiB
C
/*
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* linux/drivers/video/omap2/dss/sdi.c
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*
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* Copyright (C) 2009 Nokia Corporation
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* Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#define DSS_SUBSYS_NAME "SDI"
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#include <linux/kernel.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/regulator/consumer.h>
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#include <linux/export.h>
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#include <linux/platform_device.h>
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#include <linux/string.h>
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#include <video/omapdss.h>
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#include "dss.h"
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static struct {
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struct platform_device *pdev;
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bool update_enabled;
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struct regulator *vdds_sdi_reg;
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struct dss_lcd_mgr_config mgr_config;
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struct omap_video_timings timings;
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int datapairs;
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struct omap_dss_device output;
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} sdi;
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struct sdi_clk_calc_ctx {
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unsigned long pck_min, pck_max;
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struct dss_clock_info dss_cinfo;
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struct dispc_clock_info dispc_cinfo;
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};
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static bool dpi_calc_dispc_cb(int lckd, int pckd, unsigned long lck,
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unsigned long pck, void *data)
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{
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struct sdi_clk_calc_ctx *ctx = data;
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ctx->dispc_cinfo.lck_div = lckd;
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ctx->dispc_cinfo.pck_div = pckd;
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ctx->dispc_cinfo.lck = lck;
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ctx->dispc_cinfo.pck = pck;
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return true;
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}
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static bool dpi_calc_dss_cb(int fckd, unsigned long fck, void *data)
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{
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struct sdi_clk_calc_ctx *ctx = data;
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ctx->dss_cinfo.fck = fck;
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ctx->dss_cinfo.fck_div = fckd;
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return dispc_div_calc(fck, ctx->pck_min, ctx->pck_max,
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dpi_calc_dispc_cb, ctx);
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}
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static int sdi_calc_clock_div(unsigned long pclk,
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struct dss_clock_info *dss_cinfo,
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struct dispc_clock_info *dispc_cinfo)
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{
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int i;
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struct sdi_clk_calc_ctx ctx;
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/*
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* DSS fclk gives us very few possibilities, so finding a good pixel
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* clock may not be possible. We try multiple times to find the clock,
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* each time widening the pixel clock range we look for, up to
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* +/- 1MHz.
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*/
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for (i = 0; i < 10; ++i) {
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bool ok;
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memset(&ctx, 0, sizeof(ctx));
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if (pclk > 1000 * i * i * i)
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ctx.pck_min = max(pclk - 1000 * i * i * i, 0lu);
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else
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ctx.pck_min = 0;
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ctx.pck_max = pclk + 1000 * i * i * i;
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ok = dss_div_calc(ctx.pck_min, dpi_calc_dss_cb, &ctx);
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if (ok) {
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*dss_cinfo = ctx.dss_cinfo;
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*dispc_cinfo = ctx.dispc_cinfo;
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return 0;
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}
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}
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return -EINVAL;
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}
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static void sdi_config_lcd_manager(struct omap_dss_device *dssdev)
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{
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struct omap_overlay_manager *mgr = sdi.output.manager;
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sdi.mgr_config.io_pad_mode = DSS_IO_PAD_MODE_BYPASS;
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sdi.mgr_config.stallmode = false;
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sdi.mgr_config.fifohandcheck = false;
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sdi.mgr_config.video_port_width = 24;
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sdi.mgr_config.lcden_sig_polarity = 1;
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dss_mgr_set_lcd_config(mgr, &sdi.mgr_config);
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}
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int omapdss_sdi_display_enable(struct omap_dss_device *dssdev)
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{
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struct omap_dss_device *out = &sdi.output;
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struct omap_video_timings *t = &sdi.timings;
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struct dss_clock_info dss_cinfo;
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struct dispc_clock_info dispc_cinfo;
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unsigned long pck;
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int r;
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if (out == NULL || out->manager == NULL) {
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DSSERR("failed to enable display: no output/manager\n");
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return -ENODEV;
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}
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r = regulator_enable(sdi.vdds_sdi_reg);
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if (r)
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goto err_reg_enable;
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r = dispc_runtime_get();
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if (r)
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goto err_get_dispc;
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/* 15.5.9.1.2 */
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t->data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
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t->sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
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r = sdi_calc_clock_div(t->pixel_clock * 1000, &dss_cinfo, &dispc_cinfo);
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if (r)
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goto err_calc_clock_div;
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sdi.mgr_config.clock_info = dispc_cinfo;
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pck = dss_cinfo.fck / dispc_cinfo.lck_div / dispc_cinfo.pck_div / 1000;
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if (pck != t->pixel_clock) {
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DSSWARN("Could not find exact pixel clock. Requested %d kHz, "
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"got %lu kHz\n",
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t->pixel_clock, pck);
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t->pixel_clock = pck;
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}
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dss_mgr_set_timings(out->manager, t);
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r = dss_set_clock_div(&dss_cinfo);
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if (r)
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goto err_set_dss_clock_div;
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sdi_config_lcd_manager(dssdev);
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/*
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* LCLK and PCLK divisors are located in shadow registers, and we
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* normally write them to DISPC registers when enabling the output.
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* However, SDI uses pck-free as source clock for its PLL, and pck-free
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* is affected by the divisors. And as we need the PLL before enabling
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* the output, we need to write the divisors early.
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*
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* It seems just writing to the DISPC register is enough, and we don't
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* need to care about the shadow register mechanism for pck-free. The
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* exact reason for this is unknown.
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*/
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dispc_mgr_set_clock_div(out->manager->id, &sdi.mgr_config.clock_info);
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dss_sdi_init(sdi.datapairs);
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r = dss_sdi_enable();
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if (r)
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goto err_sdi_enable;
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mdelay(2);
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r = dss_mgr_enable(out->manager);
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if (r)
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goto err_mgr_enable;
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return 0;
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err_mgr_enable:
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dss_sdi_disable();
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err_sdi_enable:
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err_set_dss_clock_div:
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err_calc_clock_div:
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dispc_runtime_put();
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err_get_dispc:
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regulator_disable(sdi.vdds_sdi_reg);
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err_reg_enable:
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return r;
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}
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EXPORT_SYMBOL(omapdss_sdi_display_enable);
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void omapdss_sdi_display_disable(struct omap_dss_device *dssdev)
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{
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struct omap_overlay_manager *mgr = sdi.output.manager;
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dss_mgr_disable(mgr);
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dss_sdi_disable();
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dispc_runtime_put();
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regulator_disable(sdi.vdds_sdi_reg);
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}
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EXPORT_SYMBOL(omapdss_sdi_display_disable);
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void omapdss_sdi_set_timings(struct omap_dss_device *dssdev,
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struct omap_video_timings *timings)
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{
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sdi.timings = *timings;
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}
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EXPORT_SYMBOL(omapdss_sdi_set_timings);
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static void sdi_get_timings(struct omap_dss_device *dssdev,
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struct omap_video_timings *timings)
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{
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*timings = sdi.timings;
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}
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static int sdi_check_timings(struct omap_dss_device *dssdev,
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struct omap_video_timings *timings)
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{
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struct omap_overlay_manager *mgr = sdi.output.manager;
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if (mgr && !dispc_mgr_timings_ok(mgr->id, timings))
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return -EINVAL;
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if (timings->pixel_clock == 0)
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return -EINVAL;
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return 0;
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}
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void omapdss_sdi_set_datapairs(struct omap_dss_device *dssdev, int datapairs)
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{
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sdi.datapairs = datapairs;
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}
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EXPORT_SYMBOL(omapdss_sdi_set_datapairs);
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static int sdi_init_regulator(void)
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{
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struct regulator *vdds_sdi;
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if (sdi.vdds_sdi_reg)
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return 0;
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vdds_sdi = dss_get_vdds_sdi();
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if (IS_ERR(vdds_sdi)) {
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vdds_sdi = devm_regulator_get(&sdi.pdev->dev, "vdds_sdi");
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if (IS_ERR(vdds_sdi)) {
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DSSERR("can't get VDDS_SDI regulator\n");
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return PTR_ERR(vdds_sdi);
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}
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}
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sdi.vdds_sdi_reg = vdds_sdi;
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return 0;
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}
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static struct omap_dss_device *sdi_find_dssdev(struct platform_device *pdev)
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{
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struct omap_dss_board_info *pdata = pdev->dev.platform_data;
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const char *def_disp_name = omapdss_get_default_display_name();
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struct omap_dss_device *def_dssdev;
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int i;
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def_dssdev = NULL;
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for (i = 0; i < pdata->num_devices; ++i) {
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struct omap_dss_device *dssdev = pdata->devices[i];
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if (dssdev->type != OMAP_DISPLAY_TYPE_SDI)
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continue;
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if (def_dssdev == NULL)
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def_dssdev = dssdev;
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if (def_disp_name != NULL &&
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strcmp(dssdev->name, def_disp_name) == 0) {
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def_dssdev = dssdev;
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break;
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}
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}
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return def_dssdev;
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}
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static int sdi_probe_pdata(struct platform_device *sdidev)
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{
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struct omap_dss_device *plat_dssdev;
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struct omap_dss_device *dssdev;
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int r;
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plat_dssdev = sdi_find_dssdev(sdidev);
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if (!plat_dssdev)
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return 0;
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dssdev = dss_alloc_and_init_device(&sdidev->dev);
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if (!dssdev)
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return -ENOMEM;
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dss_copy_device_pdata(dssdev, plat_dssdev);
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r = sdi_init_regulator();
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if (r) {
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DSSERR("device %s init failed: %d\n", dssdev->name, r);
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dss_put_device(dssdev);
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return r;
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}
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r = omapdss_output_set_device(&sdi.output, dssdev);
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if (r) {
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DSSERR("failed to connect output to new device: %s\n",
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dssdev->name);
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dss_put_device(dssdev);
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return r;
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}
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r = dss_add_device(dssdev);
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if (r) {
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DSSERR("device %s register failed: %d\n", dssdev->name, r);
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omapdss_output_unset_device(&sdi.output);
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dss_put_device(dssdev);
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return r;
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}
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return 0;
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}
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static int sdi_connect(struct omap_dss_device *dssdev,
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struct omap_dss_device *dst)
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{
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struct omap_overlay_manager *mgr;
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int r;
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r = sdi_init_regulator();
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if (r)
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return r;
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mgr = omap_dss_get_overlay_manager(dssdev->dispc_channel);
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if (!mgr)
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return -ENODEV;
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r = dss_mgr_connect(mgr, dssdev);
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if (r)
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return r;
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r = omapdss_output_set_device(dssdev, dst);
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if (r) {
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DSSERR("failed to connect output to new device: %s\n",
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dst->name);
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dss_mgr_disconnect(mgr, dssdev);
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return r;
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}
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return 0;
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}
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static void sdi_disconnect(struct omap_dss_device *dssdev,
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struct omap_dss_device *dst)
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{
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WARN_ON(dst != dssdev->device);
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if (dst != dssdev->device)
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return;
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omapdss_output_unset_device(dssdev);
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if (dssdev->manager)
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dss_mgr_disconnect(dssdev->manager, dssdev);
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}
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static const struct omapdss_sdi_ops sdi_ops = {
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.connect = sdi_connect,
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.disconnect = sdi_disconnect,
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.enable = omapdss_sdi_display_enable,
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.disable = omapdss_sdi_display_disable,
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.check_timings = sdi_check_timings,
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.set_timings = omapdss_sdi_set_timings,
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.get_timings = sdi_get_timings,
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.set_datapairs = omapdss_sdi_set_datapairs,
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};
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static void sdi_init_output(struct platform_device *pdev)
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{
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struct omap_dss_device *out = &sdi.output;
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out->dev = &pdev->dev;
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out->id = OMAP_DSS_OUTPUT_SDI;
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out->output_type = OMAP_DISPLAY_TYPE_SDI;
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out->name = "sdi.0";
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out->dispc_channel = OMAP_DSS_CHANNEL_LCD;
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out->ops.sdi = &sdi_ops;
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out->owner = THIS_MODULE;
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omapdss_register_output(out);
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}
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static void __exit sdi_uninit_output(struct platform_device *pdev)
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{
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struct omap_dss_device *out = &sdi.output;
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omapdss_unregister_output(out);
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}
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static int omap_sdi_probe(struct platform_device *pdev)
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{
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int r;
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sdi.pdev = pdev;
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sdi_init_output(pdev);
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if (pdev->dev.platform_data) {
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r = sdi_probe_pdata(pdev);
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if (r)
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goto err_probe;
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}
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return 0;
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err_probe:
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sdi_uninit_output(pdev);
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return r;
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}
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static int __exit omap_sdi_remove(struct platform_device *pdev)
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{
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dss_unregister_child_devices(&pdev->dev);
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sdi_uninit_output(pdev);
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return 0;
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}
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static struct platform_driver omap_sdi_driver = {
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.probe = omap_sdi_probe,
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.remove = __exit_p(omap_sdi_remove),
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.driver = {
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.name = "omapdss_sdi",
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.owner = THIS_MODULE,
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},
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};
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int __init sdi_init_platform_driver(void)
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{
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return platform_driver_register(&omap_sdi_driver);
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}
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void __exit sdi_uninit_platform_driver(void)
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{
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platform_driver_unregister(&omap_sdi_driver);
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}
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