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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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9f58892ea9
Currently the code to reset the GPU and our state is spread widely across a few files. Pull the logic together into a common file. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190116153304.787-1-chris@chris-wilson.co.uk
57 lines
1.4 KiB
C
57 lines
1.4 KiB
C
/*
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* SPDX-License-Identifier: MIT
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*
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* Copyright © 2008-2018 Intel Corporation
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*/
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#ifndef I915_RESET_H
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#define I915_RESET_H
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#include <linux/compiler.h>
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#include <linux/types.h>
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struct drm_i915_private;
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struct intel_engine_cs;
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struct intel_guc;
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__printf(4, 5)
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void i915_handle_error(struct drm_i915_private *i915,
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u32 engine_mask,
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unsigned long flags,
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const char *fmt, ...);
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#define I915_ERROR_CAPTURE BIT(0)
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void i915_clear_error_registers(struct drm_i915_private *i915);
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void i915_reset(struct drm_i915_private *i915,
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unsigned int stalled_mask,
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const char *reason);
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int i915_reset_engine(struct intel_engine_cs *engine,
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const char *reason);
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bool intel_has_gpu_reset(struct drm_i915_private *i915);
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bool intel_has_reset_engine(struct drm_i915_private *i915);
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int intel_gpu_reset(struct drm_i915_private *i915, u32 engine_mask);
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int intel_reset_guc(struct drm_i915_private *i915);
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struct i915_wedge_me {
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struct delayed_work work;
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struct drm_i915_private *i915;
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const char *name;
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};
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void __i915_init_wedge(struct i915_wedge_me *w,
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struct drm_i915_private *i915,
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long timeout,
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const char *name);
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void __i915_fini_wedge(struct i915_wedge_me *w);
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#define i915_wedge_on_timeout(W, DEV, TIMEOUT) \
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for (__i915_init_wedge((W), (DEV), (TIMEOUT), __func__); \
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(W)->i915; \
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__i915_fini_wedge((W)))
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#endif /* I915_RESET_H */
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