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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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3dd9d51484
Appended patch adds the support for Intel dual-core detection and displaying
the core related information in /proc/cpuinfo.
It adds two new fields "core id" and "cpu cores" to x86 /proc/cpuinfo and the
"core id" field for x86_64("cpu cores" field is already present in x86_64).
Number of processor cores in a die is detected using cpuid(4) and this is
documented in IA-32 Intel Architecture Software Developer's Manual (vol 2a)
(http://developer.intel.com/design/pentium4/manuals/index_new.htm#sdm_vol2a)
This patch also adds cpu_core_map similar to cpu_sibling_map.
Slightly hacked by AK.
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
92 lines
2.1 KiB
C
92 lines
2.1 KiB
C
#ifndef __ASM_SMP_H
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#define __ASM_SMP_H
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/*
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* We need the APIC definitions automatically as part of 'smp.h'
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*/
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#ifndef __ASSEMBLY__
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#include <linux/config.h>
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#include <linux/kernel.h>
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#include <linux/threads.h>
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#include <linux/cpumask.h>
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#endif
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#ifdef CONFIG_X86_LOCAL_APIC
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#ifndef __ASSEMBLY__
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#include <asm/fixmap.h>
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#include <asm/bitops.h>
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#include <asm/mpspec.h>
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#ifdef CONFIG_X86_IO_APIC
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#include <asm/io_apic.h>
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#endif
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#include <asm/apic.h>
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#endif
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#endif
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#define BAD_APICID 0xFFu
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#ifdef CONFIG_SMP
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#ifndef __ASSEMBLY__
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/*
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* Private routines/data
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*/
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extern void smp_alloc_memory(void);
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extern int pic_mode;
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extern int smp_num_siblings;
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extern cpumask_t cpu_sibling_map[];
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extern cpumask_t cpu_core_map[];
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extern void smp_flush_tlb(void);
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extern void smp_message_irq(int cpl, void *dev_id, struct pt_regs *regs);
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extern void smp_invalidate_rcv(void); /* Process an NMI */
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extern void (*mtrr_hook) (void);
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extern void zap_low_mappings (void);
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#define MAX_APICID 256
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extern u8 x86_cpu_to_apicid[];
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/*
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* This function is needed by all SMP systems. It must _always_ be valid
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* from the initial startup. We map APIC_BASE very early in page_setup(),
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* so this is correct in the x86 case.
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*/
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#define __smp_processor_id() (current_thread_info()->cpu)
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extern cpumask_t cpu_callout_map;
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extern cpumask_t cpu_callin_map;
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#define cpu_possible_map cpu_callout_map
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/* We don't mark CPUs online until __cpu_up(), so we need another measure */
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static inline int num_booting_cpus(void)
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{
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return cpus_weight(cpu_callout_map);
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}
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#ifdef CONFIG_X86_LOCAL_APIC
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#ifdef APIC_DEFINITION
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extern int hard_smp_processor_id(void);
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#else
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#include <mach_apicdef.h>
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static inline int hard_smp_processor_id(void)
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{
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/* we don't want to mark this access volatile - bad code generation */
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return GET_APIC_ID(*(unsigned long *)(APIC_BASE+APIC_ID));
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}
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#endif
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static __inline int logical_smp_processor_id(void)
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{
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/* we don't want to mark this access volatile - bad code generation */
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return GET_APIC_LOGICAL_ID(*(unsigned long *)(APIC_BASE+APIC_LDR));
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}
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#endif
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#endif /* !__ASSEMBLY__ */
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#define NO_PROC_ID 0xFF /* No processor magic marker */
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#endif
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#endif
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