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be8454afc5
-----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJdLMSbAAoJEAx081l5xIa+udkP/iWr8mw44tWYb8Wuzc/aR91v 02X/J4S9XTQttNn/1Gpq9ItTLMf0Gc08tk1wEBBHAWi/qGaGZS2al+rv0afeuuQa aFhQzioDi7K/YZt92iEJhdx7wVMyydICTg3INmYlSP7/FyzLp6gBQRGSJ1kX5mHZ qWsFZgUOH9V5evyB6fDMleDaqFOKfcwrD7XYwbOheL/HeYQSv5AYn3VBupBFQ76L 0hclI5VzZQ5V0nnqRTNDQVA9Yl6NTl+2eXTn5vuBtwKXEI6JJw8eihZp2oZDXqfS L441w7wGbkRPzN5kjMZjs1ToPMTlMveR5kL6Sc+o3DT/HmIr1odeaSDXR/93UOLd z0CRJ6xMC8h1ThLNHp8UgbxCKqIwYPsY2wVqjsJt7lDY5jma7Yv2YJ9ocYGHN/sO DVHcU6ugbwvuC5wZZtVZl5J4hjnBZwNRGSVK+iM0tkjalgdEuSFehXT7eQ8SphF/ yI5gD1xNEwGfZ4bvZ3u/QrDCcpUAgPIUYmxEa2tPJILQWOJ9O87yc0y9Z21k9Ef1 9yDqrFV3sPqC2xj/0ufZG/18+Yt99Ykg1jQE3RGDwD/59KAeqPbOvqTKyVODV9jE qje6ScSIc2G0713uss2bcaD3k+rCB5YL2JkKrk5OWW/T2+n9T+JFaiNh7dnSFFcU gBKyeY24OyCDMwXrby0K =SI+Y -----END PGP SIGNATURE----- Merge tag 'drm-next-2019-07-16' of git://anongit.freedesktop.org/drm/drm Pull drm updates from Dave Airlie: "The biggest thing in this is the AMD Navi GPU support, this again contains a bunch of header files that are large. These are the new AMD RX5700 GPUs that just recently became available. New drivers: - ST-Ericsson MCDE driver - Ingenic JZ47xx SoC UAPI change: - HDR source metadata property Core: - HDR inforframes and EDID parsing - drm hdmi infoframe unpacking - remove prime sg_table caching into dma-buf - New gem vram helpers to reduce driver code - Lots of drmP.h removal - reservation fencing fix - documentation updates - drm_fb_helper_connector removed - mode name command handler rewrite fbcon: - Remove the fbcon notifiers ttm: - forward progress fixes dma-buf: - make mmap call optional - debugfs refcount fixes - dma-fence free with pending signals fix - each dma-buf gets an inode Panels: - Lots of additional panel bindings amdgpu: - initial navi10 support - avoid hw reset - HDR metadata support - new thermal sensors for vega asics - RAS fixes - use HMM rather than MMU notifier - xgmi topology via kfd - SR-IOV fixes - driver reload fixes - DC use a core bpc attribute - Aux fixes for DC - Bandwidth calc updates for DC - Clock handling refactor - kfd VEGAM support vmwgfx: - Coherent memory support changes i915: - HDR Support - HDMI i2c link - Icelake multi-segmented gamma support - GuC firmware update - Mule Creek Canyon PCH support for EHL - EHL platform updtes - move i915.alpha_support to i915.force_probe - runtime PM refactoring - VBT parsing refactoring - DSI fixes - struct mutex dependency reduction - GEM code reorg mali-dp: - Komeda driver features msm: - dsi vs EPROBE_DEFER fixes - msm8998 snapdragon 835 support - a540 gpu support - mdp5 and dpu interconnect support exynos: - drmP.h removal tegra: - misc fixes tda998x: - audio support improvements - pixel repeated mode support - quantisation range handling corrections - HDMI vendor info fix armada: - interlace support fix - overlay/video plane register handling refactor - add gamma support rockchip: - RX3328 support panfrost: - expose perf counters via hidden ioctls vkms: - enumerate CRC sources list ast: - rework BO handling mgag200: - rework BO handling dw-hdmi: - suspend/resume support rcar-du: - R8A774A1 Soc Support - LVDS dual-link mode support - Additional formats - Misc fixes omapdrm: - DSI command mode display support stm - fb modifier support - runtime PM support sun4i: - use vmap ops vc4: - binner bo binding rework v3d: - compute shader support - resync/sync fixes - job management refactoring lima: - NULL pointer in irq handler fix - scheduler default timeout virtio: - fence seqno support - trace events bochs: - misc fixes tc458767: - IRQ/HDP handling sii902x: - HDMI audio support atmel-hlcdc: - misc fixes meson: - zpos support" * tag 'drm-next-2019-07-16' of git://anongit.freedesktop.org/drm/drm: (1815 commits) Revert "Merge branch 'vmwgfx-next' of git://people.freedesktop.org/~thomash/linux into drm-next" Revert "mm: adjust apply_to_pfn_range interface for dropped token." mm: adjust apply_to_pfn_range interface for dropped token. drm/amdgpu/navi10: add uclk activity sensor drm/amdgpu: properly guard the generic discovery code drm/amdgpu: add missing documentation on new module parameters drm/amdgpu: don't invalidate caches in RELEASE_MEM, only do the writeback drm/amd/display: avoid 64-bit division drm/amdgpu/psp11: simplify the ucode register logic drm/amdgpu: properly guard DC support in navi code drm/amd/powerplay: vega20: fix uninitialized variable use drm/amd/display: dcn20: include linux/delay.h amdgpu: make pmu support optional drm/amd/powerplay: Zero initialize current_rpm in vega20_get_fan_speed_percent drm/amd/powerplay: Zero initialize freq in smu_v11_0_get_current_clk_freq drm/amd/powerplay: Use memset to initialize metrics structs drm/amdgpu/mes10.1: Fix header guard drm/amd/powerplay: add temperature sensor support for navi10 drm/amdgpu: fix scheduler timeout calc drm/amdgpu: Prepare for hmm_range_register API change (v2) ...
92 lines
2.1 KiB
C
92 lines
2.1 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2013 Red Hat
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* Author: Rob Clark <robdclark@gmail.com>
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*/
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#include "msm_drv.h"
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#include "msm_mmu.h"
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struct msm_iommu {
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struct msm_mmu base;
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struct iommu_domain *domain;
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};
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#define to_msm_iommu(x) container_of(x, struct msm_iommu, base)
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static int msm_fault_handler(struct iommu_domain *domain, struct device *dev,
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unsigned long iova, int flags, void *arg)
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{
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struct msm_iommu *iommu = arg;
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if (iommu->base.handler)
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return iommu->base.handler(iommu->base.arg, iova, flags);
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pr_warn_ratelimited("*** fault: iova=%16lx, flags=%d\n", iova, flags);
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return 0;
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}
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static int msm_iommu_attach(struct msm_mmu *mmu, const char * const *names,
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int cnt)
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{
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struct msm_iommu *iommu = to_msm_iommu(mmu);
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return iommu_attach_device(iommu->domain, mmu->dev);
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}
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static void msm_iommu_detach(struct msm_mmu *mmu, const char * const *names,
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int cnt)
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{
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struct msm_iommu *iommu = to_msm_iommu(mmu);
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iommu_detach_device(iommu->domain, mmu->dev);
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}
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static int msm_iommu_map(struct msm_mmu *mmu, uint64_t iova,
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struct sg_table *sgt, unsigned len, int prot)
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{
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struct msm_iommu *iommu = to_msm_iommu(mmu);
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size_t ret;
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ret = iommu_map_sg(iommu->domain, iova, sgt->sgl, sgt->nents, prot);
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WARN_ON(!ret);
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return (ret == len) ? 0 : -EINVAL;
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}
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static int msm_iommu_unmap(struct msm_mmu *mmu, uint64_t iova, unsigned len)
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{
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struct msm_iommu *iommu = to_msm_iommu(mmu);
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iommu_unmap(iommu->domain, iova, len);
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return 0;
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}
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static void msm_iommu_destroy(struct msm_mmu *mmu)
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{
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struct msm_iommu *iommu = to_msm_iommu(mmu);
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iommu_domain_free(iommu->domain);
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kfree(iommu);
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}
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static const struct msm_mmu_funcs funcs = {
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.attach = msm_iommu_attach,
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.detach = msm_iommu_detach,
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.map = msm_iommu_map,
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.unmap = msm_iommu_unmap,
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.destroy = msm_iommu_destroy,
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};
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struct msm_mmu *msm_iommu_new(struct device *dev, struct iommu_domain *domain)
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{
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struct msm_iommu *iommu;
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iommu = kzalloc(sizeof(*iommu), GFP_KERNEL);
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if (!iommu)
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return ERR_PTR(-ENOMEM);
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iommu->domain = domain;
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msm_mmu_init(&iommu->base, dev, &funcs);
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iommu_set_fault_handler(domain, msm_fault_handler, iommu);
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return &iommu->base;
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}
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