mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-30 10:56:44 +07:00
312 lines
7.2 KiB
C
312 lines
7.2 KiB
C
/*
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* linux/arch/arm/mach-sa1100/badge4.c
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*
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* BadgePAD 4 specific initialization
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*
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* Tim Connors <connors@hpl.hp.com>
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* Christopher Hoover <ch@hpl.hp.com>
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*
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* Copyright (C) 2002 Hewlett-Packard Company
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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#include <linux/tty.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/errno.h>
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#include <mach/hardware.h>
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#include <asm/mach-types.h>
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#include <asm/setup.h>
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#include <mach/irqs.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/flash.h>
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#include <asm/mach/map.h>
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#include <asm/hardware/sa1111.h>
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#include <asm/mach/serial_sa1100.h>
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#include <mach/badge4.h>
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#include "generic.h"
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static struct resource sa1111_resources[] = {
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[0] = {
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.start = BADGE4_SA1111_BASE,
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.end = BADGE4_SA1111_BASE + 0x00001fff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = BADGE4_IRQ_GPIO_SA1111,
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.end = BADGE4_IRQ_GPIO_SA1111,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct sa1111_platform_data sa1111_info = {
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.irq_base = IRQ_BOARD_END,
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};
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static u64 sa1111_dmamask = 0xffffffffUL;
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static struct platform_device sa1111_device = {
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.name = "sa1111",
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.id = 0,
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.dev = {
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.dma_mask = &sa1111_dmamask,
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.coherent_dma_mask = 0xffffffff,
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.platform_data = &sa1111_info,
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},
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.num_resources = ARRAY_SIZE(sa1111_resources),
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.resource = sa1111_resources,
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};
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static struct platform_device *devices[] __initdata = {
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&sa1111_device,
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};
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static int __init badge4_sa1111_init(void)
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{
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/*
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* Ensure that the memory bus request/grant signals are setup,
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* and the grant is held in its inactive state
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*/
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sa1110_mb_disable();
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/*
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* Probe for SA1111.
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*/
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return platform_add_devices(devices, ARRAY_SIZE(devices));
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}
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/*
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* 1 x Intel 28F320C3 Advanced+ Boot Block Flash (32 Mi bit)
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* Eight 4 KiW Parameter Bottom Blocks (64 KiB)
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* Sixty-three 32 KiW Main Blocks (4032 Ki b)
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*
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* <or>
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*
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* 1 x Intel 28F640C3 Advanced+ Boot Block Flash (64 Mi bit)
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* Eight 4 KiW Parameter Bottom Blocks (64 KiB)
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* One-hundred-twenty-seven 32 KiW Main Blocks (8128 Ki b)
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*/
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static struct mtd_partition badge4_partitions[] = {
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{
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.name = "BLOB boot loader",
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.offset = 0,
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.size = 0x0000A000
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}, {
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.name = "params",
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.offset = MTDPART_OFS_APPEND,
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.size = 0x00006000
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}, {
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.name = "root",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL
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}
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};
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static struct flash_platform_data badge4_flash_data = {
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.map_name = "cfi_probe",
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.parts = badge4_partitions,
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.nr_parts = ARRAY_SIZE(badge4_partitions),
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};
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static struct resource badge4_flash_resource = {
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.start = SA1100_CS0_PHYS,
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.end = SA1100_CS0_PHYS + SZ_64M - 1,
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.flags = IORESOURCE_MEM,
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};
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static int five_v_on __initdata = 0;
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static int __init five_v_on_setup(char *ignore)
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{
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five_v_on = 1;
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return 1;
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}
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__setup("five_v_on", five_v_on_setup);
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static int __init badge4_init(void)
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{
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int ret;
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if (!machine_is_badge4())
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return -ENODEV;
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/* LCD */
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GPCR = (BADGE4_GPIO_LGP2 | BADGE4_GPIO_LGP3 |
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BADGE4_GPIO_LGP4 | BADGE4_GPIO_LGP5 |
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BADGE4_GPIO_LGP6 | BADGE4_GPIO_LGP7 |
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BADGE4_GPIO_LGP8 | BADGE4_GPIO_LGP9 |
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BADGE4_GPIO_GPA_VID | BADGE4_GPIO_GPB_VID |
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BADGE4_GPIO_GPC_VID);
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GPDR &= ~BADGE4_GPIO_INT_VID;
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GPDR |= (BADGE4_GPIO_LGP2 | BADGE4_GPIO_LGP3 |
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BADGE4_GPIO_LGP4 | BADGE4_GPIO_LGP5 |
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BADGE4_GPIO_LGP6 | BADGE4_GPIO_LGP7 |
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BADGE4_GPIO_LGP8 | BADGE4_GPIO_LGP9 |
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BADGE4_GPIO_GPA_VID | BADGE4_GPIO_GPB_VID |
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BADGE4_GPIO_GPC_VID);
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/* SDRAM SPD i2c */
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GPCR = (BADGE4_GPIO_SDSDA | BADGE4_GPIO_SDSCL);
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GPDR |= (BADGE4_GPIO_SDSDA | BADGE4_GPIO_SDSCL);
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/* uart */
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GPCR = (BADGE4_GPIO_UART_HS1 | BADGE4_GPIO_UART_HS2);
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GPDR |= (BADGE4_GPIO_UART_HS1 | BADGE4_GPIO_UART_HS2);
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/* CPLD muxsel0 input for mux/adc chip select */
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GPCR = BADGE4_GPIO_MUXSEL0;
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GPDR |= BADGE4_GPIO_MUXSEL0;
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/* test points: J5, J6 as inputs, J7 outputs */
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GPDR &= ~(BADGE4_GPIO_TESTPT_J5 | BADGE4_GPIO_TESTPT_J6);
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GPCR = BADGE4_GPIO_TESTPT_J7;
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GPDR |= BADGE4_GPIO_TESTPT_J7;
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/* 5V supply rail. */
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GPCR = BADGE4_GPIO_PCMEN5V; /* initially off */
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GPDR |= BADGE4_GPIO_PCMEN5V;
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/* CPLD sdram type inputs; set up by blob */
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//GPDR |= (BADGE4_GPIO_SDTYP1 | BADGE4_GPIO_SDTYP0);
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printk(KERN_DEBUG __FILE__ ": SDRAM CPLD typ1=%d typ0=%d\n",
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!!(GPLR & BADGE4_GPIO_SDTYP1),
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!!(GPLR & BADGE4_GPIO_SDTYP0));
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/* SA1111 reset pin; set up by blob */
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//GPSR = BADGE4_GPIO_SA1111_NRST;
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//GPDR |= BADGE4_GPIO_SA1111_NRST;
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/* power management cruft */
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PGSR = 0;
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PWER = 0;
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PCFR = 0;
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PSDR = 0;
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PWER |= PWER_GPIO26; /* wake up on an edge from TESTPT_J5 */
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PWER |= PWER_RTC; /* wake up if rtc fires */
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/* drive sa1111_nrst during sleep */
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PGSR |= BADGE4_GPIO_SA1111_NRST;
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/* drive CPLD as is during sleep */
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PGSR |= (GPLR & (BADGE4_GPIO_SDTYP0|BADGE4_GPIO_SDTYP1));
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/* Now bring up the SA-1111. */
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ret = badge4_sa1111_init();
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if (ret < 0)
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printk(KERN_ERR
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"%s: SA-1111 initialization failed (%d)\n",
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__func__, ret);
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/* maybe turn on 5v0 from the start */
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badge4_set_5V(BADGE4_5V_INITIALLY, five_v_on);
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sa11x0_register_mtd(&badge4_flash_data, &badge4_flash_resource, 1);
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return 0;
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}
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arch_initcall(badge4_init);
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static unsigned badge4_5V_bitmap = 0;
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void badge4_set_5V(unsigned subsystem, int on)
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{
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unsigned long flags;
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unsigned old_5V_bitmap;
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local_irq_save(flags);
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old_5V_bitmap = badge4_5V_bitmap;
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if (on) {
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badge4_5V_bitmap |= subsystem;
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} else {
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badge4_5V_bitmap &= ~subsystem;
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}
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/* detect on->off and off->on transitions */
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if ((!old_5V_bitmap) && (badge4_5V_bitmap)) {
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/* was off, now on */
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printk(KERN_INFO "%s: enabling 5V supply rail\n", __func__);
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GPSR = BADGE4_GPIO_PCMEN5V;
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} else if ((old_5V_bitmap) && (!badge4_5V_bitmap)) {
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/* was on, now off */
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printk(KERN_INFO "%s: disabling 5V supply rail\n", __func__);
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GPCR = BADGE4_GPIO_PCMEN5V;
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}
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local_irq_restore(flags);
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}
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EXPORT_SYMBOL(badge4_set_5V);
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static struct map_desc badge4_io_desc[] __initdata = {
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{ /* SRAM bank 1 */
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.virtual = 0xf1000000,
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.pfn = __phys_to_pfn(0x08000000),
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.length = 0x00100000,
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.type = MT_DEVICE
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}, { /* SRAM bank 2 */
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.virtual = 0xf2000000,
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.pfn = __phys_to_pfn(0x10000000),
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.length = 0x00100000,
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.type = MT_DEVICE
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}, { /* SA-1111 */
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.virtual = 0xf4000000,
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.pfn = __phys_to_pfn(0x48000000),
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.length = 0x00100000,
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.type = MT_DEVICE
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}
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};
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static void
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badge4_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
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{
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if (!state) {
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Ser1SDCR0 |= SDCR0_UART;
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}
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}
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static struct sa1100_port_fns badge4_port_fns __initdata = {
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//.get_mctrl = badge4_get_mctrl,
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//.set_mctrl = badge4_set_mctrl,
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.pm = badge4_uart_pm,
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};
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static void __init badge4_map_io(void)
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{
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sa1100_map_io();
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iotable_init(badge4_io_desc, ARRAY_SIZE(badge4_io_desc));
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sa1100_register_uart_fns(&badge4_port_fns);
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sa1100_register_uart(0, 3);
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sa1100_register_uart(1, 1);
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}
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MACHINE_START(BADGE4, "Hewlett-Packard Laboratories BadgePAD 4")
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.phys_io = 0x80000000,
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.io_pg_offst = ((0xf8000000) >> 18) & 0xfffc,
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.boot_params = 0xc0000100,
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.map_io = badge4_map_io,
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.init_irq = sa1100_init_irq,
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.timer = &sa1100_timer,
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MACHINE_END
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