mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 03:15:23 +07:00
6d1c0186f3
Use devm_platform_ioremap_resource() to simplify the code a bit. This is detected by coccinelle. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: YueHaibing <yuehaibing@huawei.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
402 lines
9.2 KiB
C
402 lines
9.2 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* exynos-rng.c - Random Number Generator driver for the Exynos
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*
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* Copyright (c) 2017 Krzysztof Kozlowski <krzk@kernel.org>
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*
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* Loosely based on old driver from drivers/char/hw_random/exynos-rng.c:
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* Copyright (C) 2012 Samsung Electronics
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* Jonghwa Lee <jonghwa3.lee@samsung.com>
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*/
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#include <linux/clk.h>
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#include <linux/crypto.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <crypto/internal/rng.h>
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#define EXYNOS_RNG_CONTROL 0x0
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#define EXYNOS_RNG_STATUS 0x10
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#define EXYNOS_RNG_SEED_CONF 0x14
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#define EXYNOS_RNG_GEN_PRNG BIT(1)
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#define EXYNOS_RNG_SEED_BASE 0x140
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#define EXYNOS_RNG_SEED(n) (EXYNOS_RNG_SEED_BASE + (n * 0x4))
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#define EXYNOS_RNG_OUT_BASE 0x160
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#define EXYNOS_RNG_OUT(n) (EXYNOS_RNG_OUT_BASE + (n * 0x4))
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/* EXYNOS_RNG_CONTROL bit fields */
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#define EXYNOS_RNG_CONTROL_START 0x18
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/* EXYNOS_RNG_STATUS bit fields */
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#define EXYNOS_RNG_STATUS_SEED_SETTING_DONE BIT(1)
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#define EXYNOS_RNG_STATUS_RNG_DONE BIT(5)
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/* Five seed and output registers, each 4 bytes */
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#define EXYNOS_RNG_SEED_REGS 5
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#define EXYNOS_RNG_SEED_SIZE (EXYNOS_RNG_SEED_REGS * 4)
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enum exynos_prng_type {
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EXYNOS_PRNG_UNKNOWN = 0,
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EXYNOS_PRNG_EXYNOS4,
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EXYNOS_PRNG_EXYNOS5,
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};
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/*
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* Driver re-seeds itself with generated random numbers to hinder
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* backtracking of the original seed.
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*
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* Time for next re-seed in ms.
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*/
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#define EXYNOS_RNG_RESEED_TIME 1000
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#define EXYNOS_RNG_RESEED_BYTES 65536
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/*
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* In polling mode, do not wait infinitely for the engine to finish the work.
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*/
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#define EXYNOS_RNG_WAIT_RETRIES 100
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/* Context for crypto */
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struct exynos_rng_ctx {
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struct exynos_rng_dev *rng;
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};
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/* Device associated memory */
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struct exynos_rng_dev {
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struct device *dev;
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enum exynos_prng_type type;
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void __iomem *mem;
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struct clk *clk;
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struct mutex lock;
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/* Generated numbers stored for seeding during resume */
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u8 seed_save[EXYNOS_RNG_SEED_SIZE];
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unsigned int seed_save_len;
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/* Time of last seeding in jiffies */
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unsigned long last_seeding;
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/* Bytes generated since last seeding */
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unsigned long bytes_seeding;
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};
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static struct exynos_rng_dev *exynos_rng_dev;
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static u32 exynos_rng_readl(struct exynos_rng_dev *rng, u32 offset)
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{
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return readl_relaxed(rng->mem + offset);
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}
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static void exynos_rng_writel(struct exynos_rng_dev *rng, u32 val, u32 offset)
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{
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writel_relaxed(val, rng->mem + offset);
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}
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static int exynos_rng_set_seed(struct exynos_rng_dev *rng,
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const u8 *seed, unsigned int slen)
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{
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u32 val;
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int i;
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/* Round seed length because loop iterates over full register size */
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slen = ALIGN_DOWN(slen, 4);
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if (slen < EXYNOS_RNG_SEED_SIZE)
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return -EINVAL;
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for (i = 0; i < slen ; i += 4) {
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unsigned int seed_reg = (i / 4) % EXYNOS_RNG_SEED_REGS;
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val = seed[i] << 24;
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val |= seed[i + 1] << 16;
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val |= seed[i + 2] << 8;
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val |= seed[i + 3] << 0;
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exynos_rng_writel(rng, val, EXYNOS_RNG_SEED(seed_reg));
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}
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val = exynos_rng_readl(rng, EXYNOS_RNG_STATUS);
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if (!(val & EXYNOS_RNG_STATUS_SEED_SETTING_DONE)) {
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dev_warn(rng->dev, "Seed setting not finished\n");
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return -EIO;
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}
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rng->last_seeding = jiffies;
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rng->bytes_seeding = 0;
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return 0;
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}
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/*
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* Start the engine and poll for finish. Then read from output registers
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* filling the 'dst' buffer up to 'dlen' bytes or up to size of generated
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* random data (EXYNOS_RNG_SEED_SIZE).
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*
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* On success: return 0 and store number of read bytes under 'read' address.
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* On error: return -ERRNO.
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*/
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static int exynos_rng_get_random(struct exynos_rng_dev *rng,
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u8 *dst, unsigned int dlen,
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unsigned int *read)
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{
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int retry = EXYNOS_RNG_WAIT_RETRIES;
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if (rng->type == EXYNOS_PRNG_EXYNOS4) {
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exynos_rng_writel(rng, EXYNOS_RNG_CONTROL_START,
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EXYNOS_RNG_CONTROL);
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} else if (rng->type == EXYNOS_PRNG_EXYNOS5) {
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exynos_rng_writel(rng, EXYNOS_RNG_GEN_PRNG,
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EXYNOS_RNG_SEED_CONF);
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}
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while (!(exynos_rng_readl(rng,
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EXYNOS_RNG_STATUS) & EXYNOS_RNG_STATUS_RNG_DONE) && --retry)
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cpu_relax();
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if (!retry)
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return -ETIMEDOUT;
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/* Clear status bit */
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exynos_rng_writel(rng, EXYNOS_RNG_STATUS_RNG_DONE,
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EXYNOS_RNG_STATUS);
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*read = min_t(size_t, dlen, EXYNOS_RNG_SEED_SIZE);
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memcpy_fromio(dst, rng->mem + EXYNOS_RNG_OUT_BASE, *read);
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rng->bytes_seeding += *read;
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return 0;
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}
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/* Re-seed itself from time to time */
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static void exynos_rng_reseed(struct exynos_rng_dev *rng)
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{
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unsigned long next_seeding = rng->last_seeding + \
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msecs_to_jiffies(EXYNOS_RNG_RESEED_TIME);
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unsigned long now = jiffies;
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unsigned int read = 0;
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u8 seed[EXYNOS_RNG_SEED_SIZE];
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if (time_before(now, next_seeding) &&
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rng->bytes_seeding < EXYNOS_RNG_RESEED_BYTES)
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return;
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if (exynos_rng_get_random(rng, seed, sizeof(seed), &read))
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return;
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exynos_rng_set_seed(rng, seed, read);
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/* Let others do some of their job. */
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mutex_unlock(&rng->lock);
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mutex_lock(&rng->lock);
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}
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static int exynos_rng_generate(struct crypto_rng *tfm,
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const u8 *src, unsigned int slen,
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u8 *dst, unsigned int dlen)
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{
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struct exynos_rng_ctx *ctx = crypto_rng_ctx(tfm);
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struct exynos_rng_dev *rng = ctx->rng;
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unsigned int read = 0;
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int ret;
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ret = clk_prepare_enable(rng->clk);
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if (ret)
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return ret;
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mutex_lock(&rng->lock);
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do {
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ret = exynos_rng_get_random(rng, dst, dlen, &read);
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if (ret)
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break;
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dlen -= read;
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dst += read;
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exynos_rng_reseed(rng);
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} while (dlen > 0);
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mutex_unlock(&rng->lock);
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clk_disable_unprepare(rng->clk);
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return ret;
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}
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static int exynos_rng_seed(struct crypto_rng *tfm, const u8 *seed,
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unsigned int slen)
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{
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struct exynos_rng_ctx *ctx = crypto_rng_ctx(tfm);
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struct exynos_rng_dev *rng = ctx->rng;
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int ret;
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ret = clk_prepare_enable(rng->clk);
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if (ret)
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return ret;
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mutex_lock(&rng->lock);
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ret = exynos_rng_set_seed(ctx->rng, seed, slen);
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mutex_unlock(&rng->lock);
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clk_disable_unprepare(rng->clk);
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return ret;
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}
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static int exynos_rng_kcapi_init(struct crypto_tfm *tfm)
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{
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struct exynos_rng_ctx *ctx = crypto_tfm_ctx(tfm);
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ctx->rng = exynos_rng_dev;
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return 0;
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}
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static struct rng_alg exynos_rng_alg = {
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.generate = exynos_rng_generate,
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.seed = exynos_rng_seed,
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.seedsize = EXYNOS_RNG_SEED_SIZE,
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.base = {
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.cra_name = "stdrng",
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.cra_driver_name = "exynos_rng",
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.cra_priority = 300,
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.cra_ctxsize = sizeof(struct exynos_rng_ctx),
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.cra_module = THIS_MODULE,
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.cra_init = exynos_rng_kcapi_init,
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}
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};
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static int exynos_rng_probe(struct platform_device *pdev)
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{
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struct exynos_rng_dev *rng;
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int ret;
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if (exynos_rng_dev)
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return -EEXIST;
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rng = devm_kzalloc(&pdev->dev, sizeof(*rng), GFP_KERNEL);
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if (!rng)
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return -ENOMEM;
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rng->type = (enum exynos_prng_type)of_device_get_match_data(&pdev->dev);
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mutex_init(&rng->lock);
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rng->dev = &pdev->dev;
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rng->clk = devm_clk_get(&pdev->dev, "secss");
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if (IS_ERR(rng->clk)) {
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dev_err(&pdev->dev, "Couldn't get clock.\n");
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return PTR_ERR(rng->clk);
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}
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rng->mem = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(rng->mem))
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return PTR_ERR(rng->mem);
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platform_set_drvdata(pdev, rng);
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exynos_rng_dev = rng;
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ret = crypto_register_rng(&exynos_rng_alg);
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if (ret) {
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dev_err(&pdev->dev,
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"Couldn't register rng crypto alg: %d\n", ret);
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exynos_rng_dev = NULL;
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}
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return ret;
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}
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static int exynos_rng_remove(struct platform_device *pdev)
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{
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crypto_unregister_rng(&exynos_rng_alg);
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exynos_rng_dev = NULL;
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return 0;
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}
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static int __maybe_unused exynos_rng_suspend(struct device *dev)
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{
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struct exynos_rng_dev *rng = dev_get_drvdata(dev);
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int ret;
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/* If we were never seeded then after resume it will be the same */
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if (!rng->last_seeding)
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return 0;
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rng->seed_save_len = 0;
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ret = clk_prepare_enable(rng->clk);
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if (ret)
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return ret;
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mutex_lock(&rng->lock);
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/* Get new random numbers and store them for seeding on resume. */
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exynos_rng_get_random(rng, rng->seed_save, sizeof(rng->seed_save),
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&(rng->seed_save_len));
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mutex_unlock(&rng->lock);
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dev_dbg(rng->dev, "Stored %u bytes for seeding on system resume\n",
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rng->seed_save_len);
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clk_disable_unprepare(rng->clk);
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return 0;
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}
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static int __maybe_unused exynos_rng_resume(struct device *dev)
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{
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struct exynos_rng_dev *rng = dev_get_drvdata(dev);
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int ret;
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/* Never seeded so nothing to do */
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if (!rng->last_seeding)
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return 0;
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ret = clk_prepare_enable(rng->clk);
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if (ret)
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return ret;
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mutex_lock(&rng->lock);
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ret = exynos_rng_set_seed(rng, rng->seed_save, rng->seed_save_len);
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mutex_unlock(&rng->lock);
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clk_disable_unprepare(rng->clk);
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return ret;
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}
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static SIMPLE_DEV_PM_OPS(exynos_rng_pm_ops, exynos_rng_suspend,
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exynos_rng_resume);
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static const struct of_device_id exynos_rng_dt_match[] = {
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{
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.compatible = "samsung,exynos4-rng",
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.data = (const void *)EXYNOS_PRNG_EXYNOS4,
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}, {
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.compatible = "samsung,exynos5250-prng",
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.data = (const void *)EXYNOS_PRNG_EXYNOS5,
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},
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{ },
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};
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MODULE_DEVICE_TABLE(of, exynos_rng_dt_match);
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static struct platform_driver exynos_rng_driver = {
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.driver = {
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.name = "exynos-rng",
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.pm = &exynos_rng_pm_ops,
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.of_match_table = exynos_rng_dt_match,
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},
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.probe = exynos_rng_probe,
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.remove = exynos_rng_remove,
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};
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module_platform_driver(exynos_rng_driver);
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MODULE_DESCRIPTION("Exynos H/W Random Number Generator driver");
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MODULE_AUTHOR("Krzysztof Kozlowski <krzk@kernel.org>");
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MODULE_LICENSE("GPL v2");
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