linux_dsm_epyc7002/drivers/clk/socfpga
Colin Ian King 932329941c clk: socfpga: arria10: Fix memory leak of socfpga_clk on error return
[ Upstream commit 657d4d1934f75a2d978c3cf2086495eaa542e7a9 ]

There is an error return path that is not kfree'ing socfpga_clk leading
to a memory leak. Fix this by adding in the missing kfree call.

Addresses-Coverity: ("Resource leak")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Link: https://lore.kernel.org/r/20210406170115.430990-1-colin.king@canonical.com
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2021-05-11 14:47:28 +02:00
..
clk-agilex.c clk: socfpga: agilex: Remove unused variable 'cntr_mux' 2020-09-22 12:46:12 -07:00
clk-gate-a10.c clk: socfpga: arria10: Fix memory leak of socfpga_clk on error return 2021-05-11 14:47:28 +02:00
clk-gate-s10.c clk: socfpga: stratix10: use new parent data scheme 2020-05-26 19:13:05 -07:00
clk-gate.c clk: socfpga: fix iomem pointer cast on 64-bit 2021-04-14 08:42:12 +02:00
clk-periph-a10.c clk: socfpga: Don't reference clk_init_data after registration 2019-08-16 10:20:07 -07:00
clk-periph-s10.c clk: socfpga: stratix10: use new parent data scheme 2020-05-26 19:13:05 -07:00
clk-periph.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157 2019-05-30 11:26:37 -07:00
clk-pll-a10.c clk: socfpga: add const to _ops data structures 2020-05-26 19:13:05 -07:00
clk-pll-s10.c clk: socfpga: agilex: add clock driver for the Agilex platform 2020-05-26 19:13:05 -07:00
clk-pll.c clk: socfpga: add const to _ops data structures 2020-05-26 19:13:05 -07:00
clk-s10.c clk: socfpga: stratix10: fix the divider for the emac_ptp_free_clk 2020-09-22 12:54:41 -07:00
clk.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 13 2019-05-21 11:28:45 +02:00
clk.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288 2019-06-05 17:36:37 +02:00
Makefile clk: socfpga: agilex: add clock driver for the Agilex platform 2020-05-26 19:13:05 -07:00
stratix10-clk.h clk: socfpga: agilex: add clock driver for the Agilex platform 2020-05-26 19:13:05 -07:00