mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-21 22:37:01 +07:00
37359798ec
If INT_COAL_EN is enabled, configure time and count of interrupt coalescing. Then if CQ collects count of CQ entries in time, it will report the interrupt. Or if CQ doesn't collect enough CQ entries in time, it will report the interrupt at timeout. As all the registers are not supported to be changed dynamically, we need to config those register between disable and enable PHYs. Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com> |
||
|---|---|---|
| .. | ||
| hisi_sas_main.c | ||
| hisi_sas_v1_hw.c | ||
| hisi_sas_v2_hw.c | ||
| hisi_sas_v3_hw.c | ||
| hisi_sas.h | ||
| Kconfig | ||
| Makefile | ||