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The MPIC global timer is a hardware timer inside the Freescale PIC complying with OpenPIC standard. When the specified interval times out, the hardware timer generates an interrupt. The driver currently is only tested on fsl chip, but it can potentially support other global timers complying to OpenPIC standard. The two independent groups of global timer on fsl chip, group A and group B, are identical in their functionality, except that they appear at different locations within the PIC register map. The hardware timer can be cascaded to create timers larger than the default 31-bit global timers. Timer cascade fields allow configuration of up to two 63-bit timers. But These two groups of timers cannot be cascaded together. It can be used as a wakeup source for low power modes. It also could be used as periodical timer for protocols, drivers and etc. Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> |
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| 8xx | ||
| 40x | ||
| 44x | ||
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| 82xx | ||
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| 85xx | ||
| 86xx | ||
| 512x | ||
| amigaone | ||
| cell | ||
| chrp | ||
| embedded6xx | ||
| maple | ||
| pasemi | ||
| powermac | ||
| powernv | ||
| ps3 | ||
| pseries | ||
| wsp | ||
| fsl_uli1575.c | ||
| Kconfig | ||
| Kconfig.cputype | ||
| Makefile | ||