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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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8abd259f65
When Linux is running in the non-secure world, any write to a secure L2C register will generate an abort. Platforms normally have to call firmware to work around this. Provide a hook for them to intercept any L2C secure register write. l2c_write_sec() avoids writes to secure registers which are already set to the appropriate value, thus avoiding the overhead of needlessly calling into the secure monitor. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
148 lines
4.1 KiB
C
148 lines
4.1 KiB
C
/*
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* arch/arm/include/asm/outercache.h
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*
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* Copyright (C) 2010 ARM Ltd.
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* Written by Catalin Marinas <catalin.marinas@arm.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef __ASM_OUTERCACHE_H
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#define __ASM_OUTERCACHE_H
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#include <linux/types.h>
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struct outer_cache_fns {
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void (*inv_range)(unsigned long, unsigned long);
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void (*clean_range)(unsigned long, unsigned long);
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void (*flush_range)(unsigned long, unsigned long);
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void (*flush_all)(void);
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void (*disable)(void);
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#ifdef CONFIG_OUTER_CACHE_SYNC
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void (*sync)(void);
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#endif
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void (*resume)(void);
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/* This is an ARM L2C thing */
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void (*set_debug)(unsigned long);
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void (*write_sec)(unsigned long, unsigned);
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};
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extern struct outer_cache_fns outer_cache;
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#ifdef CONFIG_OUTER_CACHE
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/**
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* outer_inv_range - invalidate range of outer cache lines
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* @start: starting physical address, inclusive
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* @end: end physical address, exclusive
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*/
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static inline void outer_inv_range(phys_addr_t start, phys_addr_t end)
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{
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if (outer_cache.inv_range)
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outer_cache.inv_range(start, end);
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}
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/**
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* outer_clean_range - clean dirty outer cache lines
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* @start: starting physical address, inclusive
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* @end: end physical address, exclusive
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*/
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static inline void outer_clean_range(phys_addr_t start, phys_addr_t end)
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{
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if (outer_cache.clean_range)
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outer_cache.clean_range(start, end);
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}
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/**
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* outer_flush_range - clean and invalidate outer cache lines
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* @start: starting physical address, inclusive
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* @end: end physical address, exclusive
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*/
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static inline void outer_flush_range(phys_addr_t start, phys_addr_t end)
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{
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if (outer_cache.flush_range)
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outer_cache.flush_range(start, end);
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}
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/**
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* outer_flush_all - clean and invalidate all cache lines in the outer cache
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*
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* Note: depending on implementation, this may not be atomic - it must
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* only be called with interrupts disabled and no other active outer
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* cache masters.
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*
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* It is intended that this function is only used by implementations
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* needing to override the outer_cache.disable() method due to security.
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* (Some implementations perform this as a clean followed by an invalidate.)
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*/
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static inline void outer_flush_all(void)
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{
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if (outer_cache.flush_all)
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outer_cache.flush_all();
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}
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/**
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* outer_disable - clean, invalidate and disable the outer cache
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*
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* Disable the outer cache, ensuring that any data contained in the outer
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* cache is pushed out to lower levels of system memory. The note and
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* conditions above concerning outer_flush_all() applies here.
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*/
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extern void outer_disable(void);
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/**
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* outer_resume - restore the cache configuration and re-enable outer cache
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*
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* Restore any configuration that the cache had when previously enabled,
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* and re-enable the outer cache.
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*/
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static inline void outer_resume(void)
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{
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if (outer_cache.resume)
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outer_cache.resume();
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}
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#else
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static inline void outer_inv_range(phys_addr_t start, phys_addr_t end)
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{ }
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static inline void outer_clean_range(phys_addr_t start, phys_addr_t end)
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{ }
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static inline void outer_flush_range(phys_addr_t start, phys_addr_t end)
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{ }
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static inline void outer_flush_all(void) { }
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static inline void outer_disable(void) { }
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static inline void outer_resume(void) { }
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#endif
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#ifdef CONFIG_OUTER_CACHE_SYNC
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/**
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* outer_sync - perform a sync point for outer cache
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*
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* Ensure that all outer cache operations are complete and any store
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* buffers are drained.
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*/
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static inline void outer_sync(void)
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{
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if (outer_cache.sync)
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outer_cache.sync();
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}
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#else
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static inline void outer_sync(void)
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{ }
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#endif
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#endif /* __ASM_OUTERCACHE_H */
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