mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
affe8a2abd
NAND: Updates from Boris: """ This pull request contains only one notable change: * Addition of the MTK NAND controller driver And a bunch of specific NAND driver improvements/fixes. Here are the changes that are worth mentioning: * A few fixes/improvements for the xway NAND controller driver * A few fixes for the sunxi NAND controller driver * Support for DMA in the sunxi NAND driver * Support for the sunxi NAND controller IP embedded in A23/A33 SoCs * Addition for bitflips detection in erased pages to the brcmnand driver * Support for new brcmnand IPs * Update of the OMAP-GPMC binding to support DMA channel description """ In addition, some small fixes around error handling, etc., as well as one long-standing corner case issue (2.6.20, I think?) with writing 1 byte less than a page. NOR: * Rework some error handling on reads and writes, so we can better handle (for instance) SPI controllers which have limitations on their maximum transfer size * Add new Cadence Quad SPI flash controller driver * Add new Atmel QSPI flash controller driver * Add new Hisilicon SPI flash controller driver * Support a few new flash, and update supported features on others * Fix the logic used for detecting a fully-unlocked flash And other miscellaneous small fixes. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJXn/j0AAoJEFySrpd9RFgto58P/j1huB0d21zFen3teo8YKKr1 dLi65mFbqtpU1BLqD07uc2gsH17kvezFJCtx8H8Jp/yCjLF2kYIKL7wDTf6OJPtn aYGS5dG5jhMIq+6CD2olKqy+IVLfL9GvCf44Z3fpVta5lOn09y7Jm0AkBjmJcH45 SdJi+iUkSKhqRY3O2udyauGyL4JWG7eHUonrG9g8ROrO0GWQkT4Ijm1ZwIBlFDkJ e1N960OqPg5ISOzuTeM14Ok9IUyeb7wiXhqRfOJgzNk6iBcN1YC2ono3C7RH2sN7 wiyCqqUpDDCDBDiFdGOdpc9cjzNysrt02ypWRsZIpQVCm89nPLSutqQEWLuo0qzq /eIzdwbk1AxX96CeQohOezqL+n6+RHP9AIvwzL9GeWjipD1LBvfM1l3CmuSKK5jb bQ4CA/FVz1tO/25q8tuLJfpFzhFE2PC3pphVf8tREL/U6OR/97NgDMuQIuqiQpRc 4nJtu79yacAzEiztZh0bsx+t94QFE+kfs/6d8m+llLEyx2sI8HKZeDvNRwEB0OsD wQ5bjyd54m7+i4H8njrnOTP+K2YrwNjGlbTo7qrRSpFMDr4mD0VQLap03Srvo5xV OYB6uGZhGV2L3k6nG5wywM2z6Hw0QfHxjrpcLyG51xABmni2QF3lOdYSllRtRTXp aYLfPUqgIgSUI2GTDHyW =HQr0 -----END PGP SIGNATURE----- Merge tag 'for-linus-20160801' of git://git.infradead.org/linux-mtd Pull MTD updates from Brian Norris: "NAND: Quoting Boris: 'This pull request contains only one notable change: - Addition of the MTK NAND controller driver And a bunch of specific NAND driver improvements/fixes. Here are the changes that are worth mentioning: - A few fixes/improvements for the xway NAND controller driver - A few fixes for the sunxi NAND controller driver - Support for DMA in the sunxi NAND driver - Support for the sunxi NAND controller IP embedded in A23/A33 SoCs - Addition for bitflips detection in erased pages to the brcmnand driver - Support for new brcmnand IPs - Update of the OMAP-GPMC binding to support DMA channel description' In addition, some small fixes around error handling, etc., as well as one long-standing corner case issue (2.6.20, I think?) with writing 1 byte less than a page. NOR: - rework some error handling on reads and writes, so we can better handle (for instance) SPI controllers which have limitations on their maximum transfer size - add new Cadence Quad SPI flash controller driver - add new Atmel QSPI flash controller driver - add new Hisilicon SPI flash controller driver - support a few new flash, and update supported features on others - fix the logic used for detecting a fully-unlocked flash And other miscellaneous small fixes" * tag 'for-linus-20160801' of git://git.infradead.org/linux-mtd: (60 commits) mtd: spi-nor: don't build Cadence QuadSPI on non-ARM mtd: mtk-nor: remove duplicated include from mtk-quadspi.c mtd: nand: fix bug writing 1 byte less than page size mtd: update description of MTD_BCM47XXSFLASH symbol mtd: spi-nor: Add driver for Cadence Quad SPI Flash Controller mtd: spi-nor: Bindings for Cadence Quad SPI Flash Controller driver mtd: nand: brcmnand: Change BUG_ON in brcmnand_send_cmd mtd: pmcmsp-flash: Allocating too much in init_msp_flash() mtd: maps: sa1100-flash: potential NULL dereference mtd: atmel-quadspi: add driver for Atmel QSPI controller mtd: nand: omap2: fix return value check in omap_nand_probe() Documentation: atmel-quadspi: add binding file for Atmel QSPI driver mtd: spi-nor: add hisilicon spi-nor flash controller driver mtd: spi-nor: support dual, quad, and WP for Gigadevice mtd: spi-nor: Added support for n25q00a. memory: Update dependency of IFC for Layerscape mtd: nand: jz4780: Update MODULE_AUTHOR email address mtd: nand: sunxi: prevent a small memory leak mtd: nand: sunxi: add reset line support mtd: nand: sunxi: update DT bindings ...
141 lines
4.5 KiB
Plaintext
141 lines
4.5 KiB
Plaintext
#
|
|
# Memory devices
|
|
#
|
|
|
|
menuconfig MEMORY
|
|
bool "Memory Controller drivers"
|
|
|
|
if MEMORY
|
|
|
|
config ARM_PL172_MPMC
|
|
tristate "ARM PL172 MPMC driver"
|
|
depends on ARM_AMBA && OF
|
|
help
|
|
This selects the ARM PrimeCell PL172 MultiPort Memory Controller.
|
|
If you have an embedded system with an AMBA bus and a PL172
|
|
controller, say Y or M here.
|
|
|
|
config ATMEL_SDRAMC
|
|
bool "Atmel (Multi-port DDR-)SDRAM Controller"
|
|
default y
|
|
depends on ARCH_AT91 && OF
|
|
help
|
|
This driver is for Atmel SDRAM Controller or Atmel Multi-port
|
|
DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs.
|
|
Starting with the at91sam9g45, this controller supports SDR, DDR and
|
|
LP-DDR memories.
|
|
|
|
config ATMEL_EBI
|
|
bool "Atmel EBI driver"
|
|
default y
|
|
depends on ARCH_AT91 && OF
|
|
select MFD_SYSCON
|
|
help
|
|
Driver for Atmel EBI controller.
|
|
Used to configure the EBI (external bus interface) when the device-
|
|
tree is used. This bus supports NANDs, external ethernet controller,
|
|
SRAMs, ATA devices, etc.
|
|
|
|
config TI_AEMIF
|
|
tristate "Texas Instruments AEMIF driver"
|
|
depends on (ARCH_DAVINCI || ARCH_KEYSTONE) && OF
|
|
help
|
|
This driver is for the AEMIF module available in Texas Instruments
|
|
SoCs. AEMIF stands for Asynchronous External Memory Interface and
|
|
is intended to provide a glue-less interface to a variety of
|
|
asynchronuous memory devices like ASRAM, NOR and NAND memory. A total
|
|
of 256M bytes of any of these memories can be accessed at a given
|
|
time via four chip selects with 64M byte access per chip select.
|
|
|
|
config TI_EMIF
|
|
tristate "Texas Instruments EMIF driver"
|
|
depends on ARCH_OMAP2PLUS
|
|
select DDR
|
|
help
|
|
This driver is for the EMIF module available in Texas Instruments
|
|
SoCs. EMIF is an SDRAM controller that, based on its revision,
|
|
supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
|
|
This driver takes care of only LPDDR2 memories presently. The
|
|
functions of the driver includes re-configuring AC timing
|
|
parameters and other settings during frequency, voltage and
|
|
temperature changes
|
|
|
|
config OMAP_GPMC
|
|
bool
|
|
select GPIOLIB
|
|
help
|
|
This driver is for the General Purpose Memory Controller (GPMC)
|
|
present on Texas Instruments SoCs (e.g. OMAP2+). GPMC allows
|
|
interfacing to a variety of asynchronous as well as synchronous
|
|
memory drives like NOR, NAND, OneNAND, SRAM.
|
|
|
|
config OMAP_GPMC_DEBUG
|
|
bool "Enable GPMC debug output and skip reset of GPMC during init"
|
|
depends on OMAP_GPMC
|
|
help
|
|
Enables verbose debugging mostly to decode the bootloader provided
|
|
timings. To preserve the bootloader provided timings, the reset
|
|
of GPMC is skipped during init. Enable this during development to
|
|
configure devices connected to the GPMC bus.
|
|
|
|
NOTE: In addition to matching the register setup with the bootloader
|
|
you also need to match the GPMC FCLK frequency used by the
|
|
bootloader or else the GPMC timings won't be identical with the
|
|
bootloader timings.
|
|
|
|
config MVEBU_DEVBUS
|
|
bool "Marvell EBU Device Bus Controller"
|
|
default y
|
|
depends on PLAT_ORION && OF
|
|
help
|
|
This driver is for the Device Bus controller available in some
|
|
Marvell EBU SoCs such as Discovery (mv78xx0), Orion (88f5xxx) and
|
|
Armada 370 and Armada XP. This controller allows to handle flash
|
|
devices such as NOR, NAND, SRAM, and FPGA.
|
|
|
|
config TEGRA20_MC
|
|
bool "Tegra20 Memory Controller(MC) driver"
|
|
default y
|
|
depends on ARCH_TEGRA_2x_SOC
|
|
help
|
|
This driver is for the Memory Controller(MC) module available
|
|
in Tegra20 SoCs, mainly for a address translation fault
|
|
analysis, especially for IOMMU/GART(Graphics Address
|
|
Relocation Table) module.
|
|
|
|
config FSL_CORENET_CF
|
|
tristate "Freescale CoreNet Error Reporting"
|
|
depends on FSL_SOC_BOOKE
|
|
help
|
|
Say Y for reporting of errors from the Freescale CoreNet
|
|
Coherency Fabric. Errors reported include accesses to
|
|
physical addresses that mapped by no local access window
|
|
(LAW) or an invalid LAW, as well as bad cache state that
|
|
represents a coherency violation.
|
|
|
|
config FSL_IFC
|
|
bool
|
|
depends on FSL_SOC || ARCH_LAYERSCAPE
|
|
|
|
config JZ4780_NEMC
|
|
bool "Ingenic JZ4780 SoC NEMC driver"
|
|
default y
|
|
depends on MACH_JZ4780
|
|
help
|
|
This driver is for the NAND/External Memory Controller (NEMC) in
|
|
the Ingenic JZ4780. This controller is used to handle external
|
|
memory devices such as NAND and SRAM.
|
|
|
|
config MTK_SMI
|
|
bool
|
|
depends on ARCH_MEDIATEK || COMPILE_TEST
|
|
help
|
|
This driver is for the Memory Controller module in MediaTek SoCs,
|
|
mainly help enable/disable iommu and control the power domain and
|
|
clocks for each local arbiter.
|
|
|
|
source "drivers/memory/samsung/Kconfig"
|
|
source "drivers/memory/tegra/Kconfig"
|
|
|
|
endif
|