mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-30 11:16:48 +07:00
34bf1912bf
The AG6xx devices behave similar to Wilkens Peak and Stone Peak and with that it is needed to check for Intel default address. In addition it is possible to enable vendor events and diag support. Signed-off-by: Marcel Holtmann <marcel@holtmann.org> Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
338 lines
7.8 KiB
C
338 lines
7.8 KiB
C
/*
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*
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* Bluetooth HCI UART driver for Intel/AG6xx devices
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*
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* Copyright (C) 2016 Intel Corporation
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/skbuff.h>
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#include <linux/firmware.h>
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#include <linux/module.h>
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#include <linux/tty.h>
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#include <net/bluetooth/bluetooth.h>
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#include <net/bluetooth/hci_core.h>
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#include "hci_uart.h"
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#include "btintel.h"
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struct ag6xx_data {
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struct sk_buff *rx_skb;
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struct sk_buff_head txq;
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};
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struct pbn_entry {
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__le32 addr;
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__le32 plen;
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__u8 data[0];
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} __packed;
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static int ag6xx_open(struct hci_uart *hu)
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{
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struct ag6xx_data *ag6xx;
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BT_DBG("hu %p", hu);
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ag6xx = kzalloc(sizeof(*ag6xx), GFP_KERNEL);
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if (!ag6xx)
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return -ENOMEM;
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skb_queue_head_init(&ag6xx->txq);
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hu->priv = ag6xx;
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return 0;
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}
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static int ag6xx_close(struct hci_uart *hu)
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{
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struct ag6xx_data *ag6xx = hu->priv;
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BT_DBG("hu %p", hu);
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skb_queue_purge(&ag6xx->txq);
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kfree_skb(ag6xx->rx_skb);
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kfree(ag6xx);
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hu->priv = NULL;
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return 0;
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}
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static int ag6xx_flush(struct hci_uart *hu)
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{
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struct ag6xx_data *ag6xx = hu->priv;
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BT_DBG("hu %p", hu);
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skb_queue_purge(&ag6xx->txq);
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return 0;
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}
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static struct sk_buff *ag6xx_dequeue(struct hci_uart *hu)
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{
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struct ag6xx_data *ag6xx = hu->priv;
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struct sk_buff *skb;
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skb = skb_dequeue(&ag6xx->txq);
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if (!skb)
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return skb;
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/* Prepend skb with frame type */
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memcpy(skb_push(skb, 1), &bt_cb(skb)->pkt_type, 1);
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return skb;
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}
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static int ag6xx_enqueue(struct hci_uart *hu, struct sk_buff *skb)
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{
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struct ag6xx_data *ag6xx = hu->priv;
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skb_queue_tail(&ag6xx->txq, skb);
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return 0;
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}
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static const struct h4_recv_pkt ag6xx_recv_pkts[] = {
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{ H4_RECV_ACL, .recv = hci_recv_frame },
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{ H4_RECV_SCO, .recv = hci_recv_frame },
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{ H4_RECV_EVENT, .recv = hci_recv_frame },
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};
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static int ag6xx_recv(struct hci_uart *hu, const void *data, int count)
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{
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struct ag6xx_data *ag6xx = hu->priv;
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if (!test_bit(HCI_UART_REGISTERED, &hu->flags))
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return -EUNATCH;
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ag6xx->rx_skb = h4_recv_buf(hu->hdev, ag6xx->rx_skb, data, count,
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ag6xx_recv_pkts,
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ARRAY_SIZE(ag6xx_recv_pkts));
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if (IS_ERR(ag6xx->rx_skb)) {
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int err = PTR_ERR(ag6xx->rx_skb);
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bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err);
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ag6xx->rx_skb = NULL;
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return err;
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}
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return count;
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}
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static int intel_mem_write(struct hci_dev *hdev, u32 addr, u32 plen,
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const void *data)
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{
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/* Can write a maximum of 247 bytes per HCI command.
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* HCI cmd Header (3), Intel mem write header (6), data (247).
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*/
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while (plen > 0) {
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struct sk_buff *skb;
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u8 cmd_param[253], fragment_len = (plen > 247) ? 247 : plen;
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__le32 leaddr = cpu_to_le32(addr);
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memcpy(cmd_param, &leaddr, 4);
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cmd_param[4] = 0;
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cmd_param[5] = fragment_len;
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memcpy(cmd_param + 6, data, fragment_len);
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skb = __hci_cmd_sync(hdev, 0xfc8e, fragment_len + 6, cmd_param,
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HCI_INIT_TIMEOUT);
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if (IS_ERR(skb))
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return PTR_ERR(skb);
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kfree_skb(skb);
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plen -= fragment_len;
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data += fragment_len;
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addr += fragment_len;
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}
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return 0;
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}
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static int ag6xx_setup(struct hci_uart *hu)
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{
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struct hci_dev *hdev = hu->hdev;
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struct sk_buff *skb;
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struct intel_version ver;
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const struct firmware *fw;
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const u8 *fw_ptr;
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char fwname[64];
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bool patched = false;
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int err;
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hu->hdev->set_diag = btintel_set_diag;
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hu->hdev->set_bdaddr = btintel_set_bdaddr;
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err = btintel_enter_mfg(hdev);
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if (err)
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return err;
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err = btintel_read_version(hdev, &ver);
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if (err)
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return err;
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btintel_version_info(hdev, &ver);
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/* The hardware platform number has a fixed value of 0x37 and
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* for now only accept this single value.
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*/
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if (ver.hw_platform != 0x37) {
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bt_dev_err(hdev, "Unsupported Intel hardware platform: 0x%X",
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ver.hw_platform);
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return -EINVAL;
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}
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/* Only the hardware variant iBT 2.1 (AG6XX) is supported by this
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* firmware setup method.
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*/
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if (ver.hw_variant != 0x0a) {
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bt_dev_err(hdev, "Unsupported Intel hardware variant: 0x%x",
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ver.hw_variant);
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return -EINVAL;
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}
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snprintf(fwname, sizeof(fwname), "intel/ibt-hw-%x.%x.bddata",
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ver.hw_platform, ver.hw_variant);
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err = request_firmware(&fw, fwname, &hdev->dev);
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if (err < 0) {
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bt_dev_err(hdev, "Failed to open Intel bddata file: %s (%d)",
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fwname, err);
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goto patch;
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}
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fw_ptr = fw->data;
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bt_dev_info(hdev, "Applying bddata (%s)", fwname);
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skb = __hci_cmd_sync_ev(hdev, 0xfc2f, fw->size, fw->data,
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HCI_EV_CMD_STATUS, HCI_CMD_TIMEOUT);
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if (IS_ERR(skb)) {
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bt_dev_err(hdev, "Applying bddata failed (%ld)", PTR_ERR(skb));
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release_firmware(fw);
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return PTR_ERR(skb);
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}
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kfree_skb(skb);
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release_firmware(fw);
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patch:
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/* If there is no applied patch, fw_patch_num is always 0x00. In other
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* cases, current firmware is already patched. No need to patch it.
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*/
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if (ver.fw_patch_num) {
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bt_dev_info(hdev, "Device is already patched. patch num: %02x",
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ver.fw_patch_num);
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patched = true;
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goto complete;
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}
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snprintf(fwname, sizeof(fwname),
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"intel/ibt-hw-%x.%x.%x-fw-%x.%x.%x.%x.%x.pbn",
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ver.hw_platform, ver.hw_variant, ver.hw_revision,
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ver.fw_variant, ver.fw_revision, ver.fw_build_num,
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ver.fw_build_ww, ver.fw_build_yy);
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err = request_firmware(&fw, fwname, &hdev->dev);
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if (err < 0) {
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bt_dev_err(hdev, "Failed to open Intel patch file: %s(%d)",
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fwname, err);
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goto complete;
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}
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fw_ptr = fw->data;
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bt_dev_info(hdev, "Patching firmware file (%s)", fwname);
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/* PBN patch file contains a list of binary patches to be applied on top
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* of the embedded firmware. Each patch entry header contains the target
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* address and patch size.
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*
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* Patch entry:
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* | addr(le) | patch_len(le) | patch_data |
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* | 4 Bytes | 4 Bytes | n Bytes |
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*
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* PBN file is terminated by a patch entry whose address is 0xffffffff.
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*/
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while (fw->size > fw_ptr - fw->data) {
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struct pbn_entry *pbn = (void *)fw_ptr;
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u32 addr, plen;
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if (pbn->addr == 0xffffffff) {
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bt_dev_info(hdev, "Patching complete");
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patched = true;
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break;
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}
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addr = le32_to_cpu(pbn->addr);
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plen = le32_to_cpu(pbn->plen);
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if (fw->data + fw->size <= pbn->data + plen) {
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bt_dev_info(hdev, "Invalid patch len (%d)", plen);
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break;
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}
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bt_dev_info(hdev, "Patching %td/%zu", (fw_ptr - fw->data),
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fw->size);
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err = intel_mem_write(hdev, addr, plen, pbn->data);
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if (err) {
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bt_dev_err(hdev, "Patching failed");
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break;
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}
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fw_ptr = pbn->data + plen;
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}
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release_firmware(fw);
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complete:
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/* Exit manufacturing mode and reset */
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err = btintel_exit_mfg(hdev, true, patched);
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if (err)
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return err;
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/* Set the event mask for Intel specific vendor events. This enables
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* a few extra events that are useful during general operation.
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*/
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btintel_set_event_mask_mfg(hdev, false);
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btintel_check_bdaddr(hdev);
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return 0;
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}
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static const struct hci_uart_proto ag6xx_proto = {
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.id = HCI_UART_AG6XX,
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.name = "AG6XX",
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.manufacturer = 2,
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.open = ag6xx_open,
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.close = ag6xx_close,
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.flush = ag6xx_flush,
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.setup = ag6xx_setup,
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.recv = ag6xx_recv,
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.enqueue = ag6xx_enqueue,
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.dequeue = ag6xx_dequeue,
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};
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int __init ag6xx_init(void)
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{
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return hci_uart_register_proto(&ag6xx_proto);
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}
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int __exit ag6xx_deinit(void)
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{
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return hci_uart_unregister_proto(&ag6xx_proto);
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}
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