mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-02 16:56:49 +07:00
685e2d08c5
Change interrupt numbering for sparse IRQ. We do this using a fixed offset until we can drop irqs.h once all it's users have been updated. Note that this depends on the GPIO fix for the MPUIO IRQs "gpio: omap: Fix regression for MPUIO interrupts". Also note that this patch adds some extra irq alloc warnings that will go away when we stop calling irq_alloc_descs in gpio-omap.c with a follow-up patch. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: Tony Lindgren <tony@atomide.com>
99 lines
2.4 KiB
C
99 lines
2.4 KiB
C
/*
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* Helper module for board specific I2C bus registration
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*
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* Copyright (C) 2009 Nokia Corporation.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
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* 02110-1301 USA
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*
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*/
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#include <linux/i2c-omap.h>
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#include <mach/mux.h>
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#include "soc.h"
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#include <plat/i2c.h>
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#define OMAP_I2C_SIZE 0x3f
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#define OMAP1_I2C_BASE 0xfffb3800
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static const char name[] = "omap_i2c";
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static struct resource i2c_resources[2] = {
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};
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static struct platform_device omap_i2c_devices[1] = {
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};
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static void __init omap1_i2c_mux_pins(int bus_id)
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{
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if (cpu_is_omap7xx()) {
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omap_cfg_reg(I2C_7XX_SDA);
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omap_cfg_reg(I2C_7XX_SCL);
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} else {
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omap_cfg_reg(I2C_SDA);
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omap_cfg_reg(I2C_SCL);
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}
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}
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int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *pdata,
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int bus_id)
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{
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struct platform_device *pdev;
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struct resource *res;
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if (bus_id > 1)
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return -EINVAL;
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omap1_i2c_mux_pins(bus_id);
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pdev = &omap_i2c_devices[bus_id - 1];
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pdev->id = bus_id;
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pdev->name = name;
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pdev->num_resources = ARRAY_SIZE(i2c_resources);
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res = i2c_resources;
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res[0].start = OMAP1_I2C_BASE;
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res[0].end = res[0].start + OMAP_I2C_SIZE;
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res[0].flags = IORESOURCE_MEM;
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res[1].start = INT_I2C;
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res[1].flags = IORESOURCE_IRQ;
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pdev->resource = res;
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/* all OMAP1 have IP version 1 register set */
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pdata->rev = OMAP_I2C_IP_VERSION_1;
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/* all OMAP1 I2C are implemented like this */
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pdata->flags = OMAP_I2C_FLAG_NO_FIFO |
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OMAP_I2C_FLAG_SIMPLE_CLOCK |
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OMAP_I2C_FLAG_16BIT_DATA_REG |
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OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK;
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/* how the cpu bus is wired up differs for 7xx only */
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if (cpu_is_omap7xx())
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pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_1;
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else
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pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_2;
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pdev->dev.platform_data = pdata;
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return platform_device_register(pdev);
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}
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static int __init omap_i2c_cmdline(void)
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{
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return omap_register_i2c_bus_cmdline();
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}
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subsys_initcall(omap_i2c_cmdline);
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