mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-29 20:16:44 +07:00
1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
82 lines
2.6 KiB
C
82 lines
2.6 KiB
C
#ifndef _LINUX_AMIFDREG_H
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#define _LINUX_AMIFDREG_H
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/*
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** CIAAPRA bits (read only)
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*/
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#define DSKRDY (0x1<<5) /* disk ready when low */
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#define DSKTRACK0 (0x1<<4) /* head at track zero when low */
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#define DSKPROT (0x1<<3) /* disk protected when low */
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#define DSKCHANGE (0x1<<2) /* low when disk removed */
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/*
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** CIAAPRB bits (read/write)
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*/
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#define DSKMOTOR (0x1<<7) /* motor on when low */
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#define DSKSEL3 (0x1<<6) /* select drive 3 when low */
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#define DSKSEL2 (0x1<<5) /* select drive 2 when low */
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#define DSKSEL1 (0x1<<4) /* select drive 1 when low */
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#define DSKSEL0 (0x1<<3) /* select drive 0 when low */
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#define DSKSIDE (0x1<<2) /* side selection: 0 = upper, 1 = lower */
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#define DSKDIREC (0x1<<1) /* step direction: 0=in, 1=out (to trk 0) */
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#define DSKSTEP (0x1) /* pulse low to step head 1 track */
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/*
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** DSKBYTR bits (read only)
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*/
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#define DSKBYT (1<<15) /* register contains valid byte when set */
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#define DMAON (1<<14) /* disk DMA enabled */
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#define DISKWRITE (1<<13) /* disk write bit in DSKLEN enabled */
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#define WORDEQUAL (1<<12) /* DSKSYNC register match when true */
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/* bits 7-0 are data */
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/*
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** ADKCON/ADKCONR bits
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*/
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#ifndef SETCLR
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#define ADK_SETCLR (1<<15) /* control bit */
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#endif
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#define ADK_PRECOMP1 (1<<14) /* precompensation selection */
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#define ADK_PRECOMP0 (1<<13) /* 00=none, 01=140ns, 10=280ns, 11=500ns */
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#define ADK_MFMPREC (1<<12) /* 0=GCR precomp., 1=MFM precomp. */
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#define ADK_WORDSYNC (1<<10) /* enable DSKSYNC auto DMA */
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#define ADK_MSBSYNC (1<<9) /* when 1, enable sync on MSbit (for GCR) */
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#define ADK_FAST (1<<8) /* bit cell: 0=2us (GCR), 1=1us (MFM) */
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/*
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** DSKLEN bits
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*/
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#define DSKLEN_DMAEN (1<<15)
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#define DSKLEN_WRITE (1<<14)
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/*
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** INTENA/INTREQ bits
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*/
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#define DSKINDEX (0x1<<4) /* DSKINDEX bit */
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/*
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** Misc
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*/
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#define MFM_SYNC 0x4489 /* standard MFM sync value */
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/* Values for FD_COMMAND */
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#define FD_RECALIBRATE 0x07 /* move to track 0 */
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#define FD_SEEK 0x0F /* seek track */
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#define FD_READ 0xE6 /* read with MT, MFM, SKip deleted */
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#define FD_WRITE 0xC5 /* write with MT, MFM */
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#define FD_SENSEI 0x08 /* Sense Interrupt Status */
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#define FD_SPECIFY 0x03 /* specify HUT etc */
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#define FD_FORMAT 0x4D /* format one track */
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#define FD_VERSION 0x10 /* get version code */
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#define FD_CONFIGURE 0x13 /* configure FIFO operation */
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#define FD_PERPENDICULAR 0x12 /* perpendicular r/w mode */
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#endif /* _LINUX_AMIFDREG_H */
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