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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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c82baa2818
This implements DPM for tonga. DPM handles dynamic clock and voltage scaling. v2: merge all the patches related with tonga dpm v3: merge dpm force level fix, cgs display fix, spelling fix Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: yanyang1 <young.yang@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
65 lines
2.2 KiB
C
65 lines
2.2 KiB
C
/*
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* Copyright 2015 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include <linux/types.h>
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#include "atom-types.h"
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#include "atombios.h"
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#include "pppcielanes.h"
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/** \file
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* Functions related to PCIe lane changes.
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*/
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/* For converting from number of lanes to lane bits. */
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static const unsigned char pp_r600_encode_lanes[] = {
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0, /* 0 Not Supported */
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1, /* 1 Lane */
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2, /* 2 Lanes */
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0, /* 3 Not Supported */
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3, /* 4 Lanes */
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0, /* 5 Not Supported */
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0, /* 6 Not Supported */
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0, /* 7 Not Supported */
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4, /* 8 Lanes */
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0, /* 9 Not Supported */
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0, /* 10 Not Supported */
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0, /* 11 Not Supported */
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5, /* 12 Lanes (Not actually supported) */
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0, /* 13 Not Supported */
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0, /* 14 Not Supported */
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0, /* 15 Not Supported */
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6 /* 16 Lanes */
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};
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static const unsigned char pp_r600_decoded_lanes[8] = { 16, 1, 2, 4, 8, 12, 16, };
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uint8_t encode_pcie_lane_width(uint32_t num_lanes)
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{
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return pp_r600_encode_lanes[num_lanes];
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}
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uint8_t decode_pcie_lane_width(uint32_t num_lanes)
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{
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return pp_r600_decoded_lanes[num_lanes];
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}
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