mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-02 09:26:43 +07:00
1d48922c14
The nmi stuff is changing a lot and adding more functionality. Split it out from the traps.c file so it doesn't continue to pollute that file. This makes it easier to find and expand all the future nmi related work. No real functional changes here. Signed-off-by: Don Zickus <dzickus@redhat.com> Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1317409584-23662-2-git-send-email-dzickus@redhat.com Signed-off-by: Ingo Molnar <mingo@elte.hu>
727 lines
19 KiB
C
727 lines
19 KiB
C
/*
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* Copyright (C) 1991, 1992 Linus Torvalds
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* Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
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*
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* Pentium III FXSR, SSE support
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* Gareth Hughes <gareth@valinux.com>, May 2000
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*/
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/*
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* Handle hardware traps and faults.
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*/
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#include <linux/interrupt.h>
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#include <linux/kallsyms.h>
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#include <linux/spinlock.h>
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#include <linux/kprobes.h>
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#include <linux/uaccess.h>
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#include <linux/kdebug.h>
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#include <linux/kgdb.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/ptrace.h>
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#include <linux/string.h>
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#include <linux/delay.h>
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#include <linux/errno.h>
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#include <linux/kexec.h>
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#include <linux/sched.h>
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#include <linux/timer.h>
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#include <linux/init.h>
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#include <linux/bug.h>
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#include <linux/nmi.h>
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#include <linux/mm.h>
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#include <linux/smp.h>
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#include <linux/io.h>
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#ifdef CONFIG_EISA
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#include <linux/ioport.h>
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#include <linux/eisa.h>
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#endif
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#ifdef CONFIG_MCA
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#include <linux/mca.h>
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#endif
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#if defined(CONFIG_EDAC)
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#include <linux/edac.h>
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#endif
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#include <asm/kmemcheck.h>
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#include <asm/stacktrace.h>
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#include <asm/processor.h>
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#include <asm/debugreg.h>
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#include <linux/atomic.h>
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#include <asm/system.h>
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#include <asm/traps.h>
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#include <asm/desc.h>
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#include <asm/i387.h>
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#include <asm/mce.h>
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#include <asm/mach_traps.h>
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#ifdef CONFIG_X86_64
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#include <asm/x86_init.h>
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#include <asm/pgalloc.h>
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#include <asm/proto.h>
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#else
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#include <asm/processor-flags.h>
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#include <asm/setup.h>
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asmlinkage int system_call(void);
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/* Do we ignore FPU interrupts ? */
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char ignore_fpu_irq;
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/*
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* The IDT has to be page-aligned to simplify the Pentium
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* F0 0F bug workaround.
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*/
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gate_desc idt_table[NR_VECTORS] __page_aligned_data = { { { { 0, 0 } } }, };
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#endif
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DECLARE_BITMAP(used_vectors, NR_VECTORS);
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EXPORT_SYMBOL_GPL(used_vectors);
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static inline void conditional_sti(struct pt_regs *regs)
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{
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if (regs->flags & X86_EFLAGS_IF)
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local_irq_enable();
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}
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static inline void preempt_conditional_sti(struct pt_regs *regs)
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{
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inc_preempt_count();
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if (regs->flags & X86_EFLAGS_IF)
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local_irq_enable();
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}
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static inline void conditional_cli(struct pt_regs *regs)
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{
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if (regs->flags & X86_EFLAGS_IF)
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local_irq_disable();
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}
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static inline void preempt_conditional_cli(struct pt_regs *regs)
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{
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if (regs->flags & X86_EFLAGS_IF)
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local_irq_disable();
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dec_preempt_count();
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}
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static void __kprobes
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do_trap(int trapnr, int signr, char *str, struct pt_regs *regs,
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long error_code, siginfo_t *info)
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{
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struct task_struct *tsk = current;
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#ifdef CONFIG_X86_32
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if (regs->flags & X86_VM_MASK) {
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/*
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* traps 0, 1, 3, 4, and 5 should be forwarded to vm86.
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* On nmi (interrupt 2), do_trap should not be called.
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*/
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if (trapnr < 6)
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goto vm86_trap;
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goto trap_signal;
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}
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#endif
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if (!user_mode(regs))
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goto kernel_trap;
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#ifdef CONFIG_X86_32
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trap_signal:
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#endif
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/*
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* We want error_code and trap_no set for userspace faults and
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* kernelspace faults which result in die(), but not
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* kernelspace faults which are fixed up. die() gives the
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* process no chance to handle the signal and notice the
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* kernel fault information, so that won't result in polluting
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* the information about previously queued, but not yet
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* delivered, faults. See also do_general_protection below.
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*/
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tsk->thread.error_code = error_code;
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tsk->thread.trap_no = trapnr;
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#ifdef CONFIG_X86_64
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if (show_unhandled_signals && unhandled_signal(tsk, signr) &&
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printk_ratelimit()) {
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printk(KERN_INFO
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"%s[%d] trap %s ip:%lx sp:%lx error:%lx",
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tsk->comm, tsk->pid, str,
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regs->ip, regs->sp, error_code);
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print_vma_addr(" in ", regs->ip);
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printk("\n");
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}
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#endif
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if (info)
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force_sig_info(signr, info, tsk);
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else
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force_sig(signr, tsk);
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return;
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kernel_trap:
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if (!fixup_exception(regs)) {
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tsk->thread.error_code = error_code;
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tsk->thread.trap_no = trapnr;
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die(str, regs, error_code);
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}
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return;
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#ifdef CONFIG_X86_32
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vm86_trap:
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if (handle_vm86_trap((struct kernel_vm86_regs *) regs,
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error_code, trapnr))
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goto trap_signal;
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return;
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#endif
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}
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#define DO_ERROR(trapnr, signr, str, name) \
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dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
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{ \
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if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
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== NOTIFY_STOP) \
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return; \
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conditional_sti(regs); \
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do_trap(trapnr, signr, str, regs, error_code, NULL); \
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}
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#define DO_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
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dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
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{ \
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siginfo_t info; \
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info.si_signo = signr; \
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info.si_errno = 0; \
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info.si_code = sicode; \
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info.si_addr = (void __user *)siaddr; \
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if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
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== NOTIFY_STOP) \
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return; \
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conditional_sti(regs); \
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do_trap(trapnr, signr, str, regs, error_code, &info); \
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}
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DO_ERROR_INFO(0, SIGFPE, "divide error", divide_error, FPE_INTDIV, regs->ip)
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DO_ERROR(4, SIGSEGV, "overflow", overflow)
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DO_ERROR(5, SIGSEGV, "bounds", bounds)
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DO_ERROR_INFO(6, SIGILL, "invalid opcode", invalid_op, ILL_ILLOPN, regs->ip)
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DO_ERROR(9, SIGFPE, "coprocessor segment overrun", coprocessor_segment_overrun)
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DO_ERROR(10, SIGSEGV, "invalid TSS", invalid_TSS)
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DO_ERROR(11, SIGBUS, "segment not present", segment_not_present)
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#ifdef CONFIG_X86_32
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DO_ERROR(12, SIGBUS, "stack segment", stack_segment)
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#endif
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DO_ERROR_INFO(17, SIGBUS, "alignment check", alignment_check, BUS_ADRALN, 0)
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#ifdef CONFIG_X86_64
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/* Runs on IST stack */
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dotraplinkage void do_stack_segment(struct pt_regs *regs, long error_code)
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{
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if (notify_die(DIE_TRAP, "stack segment", regs, error_code,
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12, SIGBUS) == NOTIFY_STOP)
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return;
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preempt_conditional_sti(regs);
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do_trap(12, SIGBUS, "stack segment", regs, error_code, NULL);
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preempt_conditional_cli(regs);
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}
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dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code)
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{
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static const char str[] = "double fault";
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struct task_struct *tsk = current;
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/* Return not checked because double check cannot be ignored */
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notify_die(DIE_TRAP, str, regs, error_code, 8, SIGSEGV);
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tsk->thread.error_code = error_code;
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tsk->thread.trap_no = 8;
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/*
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* This is always a kernel trap and never fixable (and thus must
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* never return).
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*/
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for (;;)
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die(str, regs, error_code);
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}
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#endif
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dotraplinkage void __kprobes
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do_general_protection(struct pt_regs *regs, long error_code)
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{
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struct task_struct *tsk;
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conditional_sti(regs);
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#ifdef CONFIG_X86_32
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if (regs->flags & X86_VM_MASK)
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goto gp_in_vm86;
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#endif
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tsk = current;
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if (!user_mode(regs))
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goto gp_in_kernel;
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tsk->thread.error_code = error_code;
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tsk->thread.trap_no = 13;
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if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) &&
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printk_ratelimit()) {
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printk(KERN_INFO
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"%s[%d] general protection ip:%lx sp:%lx error:%lx",
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tsk->comm, task_pid_nr(tsk),
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regs->ip, regs->sp, error_code);
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print_vma_addr(" in ", regs->ip);
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printk("\n");
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}
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force_sig(SIGSEGV, tsk);
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return;
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#ifdef CONFIG_X86_32
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gp_in_vm86:
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local_irq_enable();
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handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
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return;
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#endif
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gp_in_kernel:
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if (fixup_exception(regs))
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return;
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tsk->thread.error_code = error_code;
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tsk->thread.trap_no = 13;
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if (notify_die(DIE_GPF, "general protection fault", regs,
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error_code, 13, SIGSEGV) == NOTIFY_STOP)
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return;
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die("general protection fault", regs, error_code);
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}
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/* May run on IST stack. */
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dotraplinkage void __kprobes do_int3(struct pt_regs *regs, long error_code)
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{
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#ifdef CONFIG_KGDB_LOW_LEVEL_TRAP
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if (kgdb_ll_trap(DIE_INT3, "int3", regs, error_code, 3, SIGTRAP)
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== NOTIFY_STOP)
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return;
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#endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */
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#ifdef CONFIG_KPROBES
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if (notify_die(DIE_INT3, "int3", regs, error_code, 3, SIGTRAP)
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== NOTIFY_STOP)
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return;
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#else
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if (notify_die(DIE_TRAP, "int3", regs, error_code, 3, SIGTRAP)
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== NOTIFY_STOP)
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return;
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#endif
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preempt_conditional_sti(regs);
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do_trap(3, SIGTRAP, "int3", regs, error_code, NULL);
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preempt_conditional_cli(regs);
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}
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#ifdef CONFIG_X86_64
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/*
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* Help handler running on IST stack to switch back to user stack
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* for scheduling or signal handling. The actual stack switch is done in
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* entry.S
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*/
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asmlinkage __kprobes struct pt_regs *sync_regs(struct pt_regs *eregs)
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{
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struct pt_regs *regs = eregs;
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/* Did already sync */
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if (eregs == (struct pt_regs *)eregs->sp)
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;
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/* Exception from user space */
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else if (user_mode(eregs))
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regs = task_pt_regs(current);
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/*
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* Exception from kernel and interrupts are enabled. Move to
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* kernel process stack.
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*/
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else if (eregs->flags & X86_EFLAGS_IF)
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regs = (struct pt_regs *)(eregs->sp -= sizeof(struct pt_regs));
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if (eregs != regs)
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*regs = *eregs;
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return regs;
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}
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#endif
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/*
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* Our handling of the processor debug registers is non-trivial.
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* We do not clear them on entry and exit from the kernel. Therefore
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* it is possible to get a watchpoint trap here from inside the kernel.
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* However, the code in ./ptrace.c has ensured that the user can
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* only set watchpoints on userspace addresses. Therefore the in-kernel
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* watchpoint trap can only occur in code which is reading/writing
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* from user space. Such code must not hold kernel locks (since it
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* can equally take a page fault), therefore it is safe to call
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* force_sig_info even though that claims and releases locks.
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*
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* Code in ./signal.c ensures that the debug control register
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* is restored before we deliver any signal, and therefore that
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* user code runs with the correct debug control register even though
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* we clear it here.
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*
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* Being careful here means that we don't have to be as careful in a
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* lot of more complicated places (task switching can be a bit lazy
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* about restoring all the debug state, and ptrace doesn't have to
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* find every occurrence of the TF bit that could be saved away even
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* by user code)
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*
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* May run on IST stack.
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*/
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dotraplinkage void __kprobes do_debug(struct pt_regs *regs, long error_code)
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{
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struct task_struct *tsk = current;
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int user_icebp = 0;
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unsigned long dr6;
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int si_code;
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get_debugreg(dr6, 6);
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/* Filter out all the reserved bits which are preset to 1 */
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dr6 &= ~DR6_RESERVED;
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/*
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* If dr6 has no reason to give us about the origin of this trap,
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* then it's very likely the result of an icebp/int01 trap.
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* User wants a sigtrap for that.
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*/
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if (!dr6 && user_mode(regs))
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user_icebp = 1;
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/* Catch kmemcheck conditions first of all! */
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if ((dr6 & DR_STEP) && kmemcheck_trap(regs))
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return;
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/* DR6 may or may not be cleared by the CPU */
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set_debugreg(0, 6);
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/*
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* The processor cleared BTF, so don't mark that we need it set.
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*/
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clear_tsk_thread_flag(tsk, TIF_BLOCKSTEP);
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/* Store the virtualized DR6 value */
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tsk->thread.debugreg6 = dr6;
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if (notify_die(DIE_DEBUG, "debug", regs, PTR_ERR(&dr6), error_code,
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SIGTRAP) == NOTIFY_STOP)
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return;
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/* It's safe to allow irq's after DR6 has been saved */
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preempt_conditional_sti(regs);
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if (regs->flags & X86_VM_MASK) {
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handle_vm86_trap((struct kernel_vm86_regs *) regs,
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error_code, 1);
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preempt_conditional_cli(regs);
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return;
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}
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/*
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* Single-stepping through system calls: ignore any exceptions in
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* kernel space, but re-enable TF when returning to user mode.
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*
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* We already checked v86 mode above, so we can check for kernel mode
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* by just checking the CPL of CS.
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*/
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if ((dr6 & DR_STEP) && !user_mode(regs)) {
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tsk->thread.debugreg6 &= ~DR_STEP;
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set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
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regs->flags &= ~X86_EFLAGS_TF;
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}
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si_code = get_si_code(tsk->thread.debugreg6);
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if (tsk->thread.debugreg6 & (DR_STEP | DR_TRAP_BITS) || user_icebp)
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send_sigtrap(tsk, regs, error_code, si_code);
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preempt_conditional_cli(regs);
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return;
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}
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/*
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* Note that we play around with the 'TS' bit in an attempt to get
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* the correct behaviour even in the presence of the asynchronous
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* IRQ13 behaviour
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*/
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void math_error(struct pt_regs *regs, int error_code, int trapnr)
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{
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struct task_struct *task = current;
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siginfo_t info;
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unsigned short err;
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char *str = (trapnr == 16) ? "fpu exception" : "simd exception";
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if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, SIGFPE) == NOTIFY_STOP)
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return;
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conditional_sti(regs);
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if (!user_mode_vm(regs))
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{
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if (!fixup_exception(regs)) {
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task->thread.error_code = error_code;
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task->thread.trap_no = trapnr;
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die(str, regs, error_code);
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}
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return;
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}
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/*
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* Save the info for the exception handler and clear the error.
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*/
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save_init_fpu(task);
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task->thread.trap_no = trapnr;
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task->thread.error_code = error_code;
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info.si_signo = SIGFPE;
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info.si_errno = 0;
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info.si_addr = (void __user *)regs->ip;
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if (trapnr == 16) {
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unsigned short cwd, swd;
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/*
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* (~cwd & swd) will mask out exceptions that are not set to unmasked
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* status. 0x3f is the exception bits in these regs, 0x200 is the
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* C1 reg you need in case of a stack fault, 0x040 is the stack
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* fault bit. We should only be taking one exception at a time,
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* so if this combination doesn't produce any single exception,
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* then we have a bad program that isn't synchronizing its FPU usage
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|
* and it will suffer the consequences since we won't be able to
|
|
* fully reproduce the context of the exception
|
|
*/
|
|
cwd = get_fpu_cwd(task);
|
|
swd = get_fpu_swd(task);
|
|
|
|
err = swd & ~cwd;
|
|
} else {
|
|
/*
|
|
* The SIMD FPU exceptions are handled a little differently, as there
|
|
* is only a single status/control register. Thus, to determine which
|
|
* unmasked exception was caught we must mask the exception mask bits
|
|
* at 0x1f80, and then use these to mask the exception bits at 0x3f.
|
|
*/
|
|
unsigned short mxcsr = get_fpu_mxcsr(task);
|
|
err = ~(mxcsr >> 7) & mxcsr;
|
|
}
|
|
|
|
if (err & 0x001) { /* Invalid op */
|
|
/*
|
|
* swd & 0x240 == 0x040: Stack Underflow
|
|
* swd & 0x240 == 0x240: Stack Overflow
|
|
* User must clear the SF bit (0x40) if set
|
|
*/
|
|
info.si_code = FPE_FLTINV;
|
|
} else if (err & 0x004) { /* Divide by Zero */
|
|
info.si_code = FPE_FLTDIV;
|
|
} else if (err & 0x008) { /* Overflow */
|
|
info.si_code = FPE_FLTOVF;
|
|
} else if (err & 0x012) { /* Denormal, Underflow */
|
|
info.si_code = FPE_FLTUND;
|
|
} else if (err & 0x020) { /* Precision */
|
|
info.si_code = FPE_FLTRES;
|
|
} else {
|
|
/*
|
|
* If we're using IRQ 13, or supposedly even some trap 16
|
|
* implementations, it's possible we get a spurious trap...
|
|
*/
|
|
return; /* Spurious trap, no error */
|
|
}
|
|
force_sig_info(SIGFPE, &info, task);
|
|
}
|
|
|
|
dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code)
|
|
{
|
|
#ifdef CONFIG_X86_32
|
|
ignore_fpu_irq = 1;
|
|
#endif
|
|
|
|
math_error(regs, error_code, 16);
|
|
}
|
|
|
|
dotraplinkage void
|
|
do_simd_coprocessor_error(struct pt_regs *regs, long error_code)
|
|
{
|
|
math_error(regs, error_code, 19);
|
|
}
|
|
|
|
dotraplinkage void
|
|
do_spurious_interrupt_bug(struct pt_regs *regs, long error_code)
|
|
{
|
|
conditional_sti(regs);
|
|
#if 0
|
|
/* No need to warn about this any longer. */
|
|
printk(KERN_INFO "Ignoring P6 Local APIC Spurious Interrupt Bug...\n");
|
|
#endif
|
|
}
|
|
|
|
asmlinkage void __attribute__((weak)) smp_thermal_interrupt(void)
|
|
{
|
|
}
|
|
|
|
asmlinkage void __attribute__((weak)) smp_threshold_interrupt(void)
|
|
{
|
|
}
|
|
|
|
/*
|
|
* __math_state_restore assumes that cr0.TS is already clear and the
|
|
* fpu state is all ready for use. Used during context switch.
|
|
*/
|
|
void __math_state_restore(void)
|
|
{
|
|
struct thread_info *thread = current_thread_info();
|
|
struct task_struct *tsk = thread->task;
|
|
|
|
/*
|
|
* Paranoid restore. send a SIGSEGV if we fail to restore the state.
|
|
*/
|
|
if (unlikely(restore_fpu_checking(tsk))) {
|
|
stts();
|
|
force_sig(SIGSEGV, tsk);
|
|
return;
|
|
}
|
|
|
|
thread->status |= TS_USEDFPU; /* So we fnsave on switch_to() */
|
|
tsk->fpu_counter++;
|
|
}
|
|
|
|
/*
|
|
* 'math_state_restore()' saves the current math information in the
|
|
* old math state array, and gets the new ones from the current task
|
|
*
|
|
* Careful.. There are problems with IBM-designed IRQ13 behaviour.
|
|
* Don't touch unless you *really* know how it works.
|
|
*
|
|
* Must be called with kernel preemption disabled (in this case,
|
|
* local interrupts are disabled at the call-site in entry.S).
|
|
*/
|
|
asmlinkage void math_state_restore(void)
|
|
{
|
|
struct thread_info *thread = current_thread_info();
|
|
struct task_struct *tsk = thread->task;
|
|
|
|
if (!tsk_used_math(tsk)) {
|
|
local_irq_enable();
|
|
/*
|
|
* does a slab alloc which can sleep
|
|
*/
|
|
if (init_fpu(tsk)) {
|
|
/*
|
|
* ran out of memory!
|
|
*/
|
|
do_group_exit(SIGKILL);
|
|
return;
|
|
}
|
|
local_irq_disable();
|
|
}
|
|
|
|
clts(); /* Allow maths ops (or we recurse) */
|
|
|
|
__math_state_restore();
|
|
}
|
|
EXPORT_SYMBOL_GPL(math_state_restore);
|
|
|
|
dotraplinkage void __kprobes
|
|
do_device_not_available(struct pt_regs *regs, long error_code)
|
|
{
|
|
#ifdef CONFIG_MATH_EMULATION
|
|
if (read_cr0() & X86_CR0_EM) {
|
|
struct math_emu_info info = { };
|
|
|
|
conditional_sti(regs);
|
|
|
|
info.regs = regs;
|
|
math_emulate(&info);
|
|
return;
|
|
}
|
|
#endif
|
|
math_state_restore(); /* interrupts still off */
|
|
#ifdef CONFIG_X86_32
|
|
conditional_sti(regs);
|
|
#endif
|
|
}
|
|
|
|
#ifdef CONFIG_X86_32
|
|
dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code)
|
|
{
|
|
siginfo_t info;
|
|
local_irq_enable();
|
|
|
|
info.si_signo = SIGILL;
|
|
info.si_errno = 0;
|
|
info.si_code = ILL_BADSTK;
|
|
info.si_addr = NULL;
|
|
if (notify_die(DIE_TRAP, "iret exception",
|
|
regs, error_code, 32, SIGILL) == NOTIFY_STOP)
|
|
return;
|
|
do_trap(32, SIGILL, "iret exception", regs, error_code, &info);
|
|
}
|
|
#endif
|
|
|
|
/* Set of traps needed for early debugging. */
|
|
void __init early_trap_init(void)
|
|
{
|
|
set_intr_gate_ist(1, &debug, DEBUG_STACK);
|
|
/* int3 can be called from all */
|
|
set_system_intr_gate_ist(3, &int3, DEBUG_STACK);
|
|
set_intr_gate(14, &page_fault);
|
|
load_idt(&idt_descr);
|
|
}
|
|
|
|
void __init trap_init(void)
|
|
{
|
|
int i;
|
|
|
|
#ifdef CONFIG_EISA
|
|
void __iomem *p = early_ioremap(0x0FFFD9, 4);
|
|
|
|
if (readl(p) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24))
|
|
EISA_bus = 1;
|
|
early_iounmap(p, 4);
|
|
#endif
|
|
|
|
set_intr_gate(0, ÷_error);
|
|
set_intr_gate_ist(2, &nmi, NMI_STACK);
|
|
/* int4 can be called from all */
|
|
set_system_intr_gate(4, &overflow);
|
|
set_intr_gate(5, &bounds);
|
|
set_intr_gate(6, &invalid_op);
|
|
set_intr_gate(7, &device_not_available);
|
|
#ifdef CONFIG_X86_32
|
|
set_task_gate(8, GDT_ENTRY_DOUBLEFAULT_TSS);
|
|
#else
|
|
set_intr_gate_ist(8, &double_fault, DOUBLEFAULT_STACK);
|
|
#endif
|
|
set_intr_gate(9, &coprocessor_segment_overrun);
|
|
set_intr_gate(10, &invalid_TSS);
|
|
set_intr_gate(11, &segment_not_present);
|
|
set_intr_gate_ist(12, &stack_segment, STACKFAULT_STACK);
|
|
set_intr_gate(13, &general_protection);
|
|
set_intr_gate(15, &spurious_interrupt_bug);
|
|
set_intr_gate(16, &coprocessor_error);
|
|
set_intr_gate(17, &alignment_check);
|
|
#ifdef CONFIG_X86_MCE
|
|
set_intr_gate_ist(18, &machine_check, MCE_STACK);
|
|
#endif
|
|
set_intr_gate(19, &simd_coprocessor_error);
|
|
|
|
/* Reserve all the builtin and the syscall vector: */
|
|
for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++)
|
|
set_bit(i, used_vectors);
|
|
|
|
#ifdef CONFIG_IA32_EMULATION
|
|
set_system_intr_gate(IA32_SYSCALL_VECTOR, ia32_syscall);
|
|
set_bit(IA32_SYSCALL_VECTOR, used_vectors);
|
|
#endif
|
|
|
|
#ifdef CONFIG_X86_32
|
|
set_system_trap_gate(SYSCALL_VECTOR, &system_call);
|
|
set_bit(SYSCALL_VECTOR, used_vectors);
|
|
#endif
|
|
|
|
/*
|
|
* Should be a barrier for any external CPU state:
|
|
*/
|
|
cpu_init();
|
|
|
|
x86_init.irqs.trap_init();
|
|
}
|