mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-06 04:26:39 +07:00
4ab2495a30
I sent this out a couple of months ago and the driver author said it he'd merge it. Nothing has happened since so I'm submitting it directly. No functionality changes just texts. Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
897 lines
22 KiB
C
897 lines
22 KiB
C
/*
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* Telecom Clock driver for Intel NetStructure(tm) MPCBL0010
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*
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* Copyright (C) 2005 Kontron Canada
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*
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* All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or (at
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* your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for more
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* details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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* Send feedback to <sebastien.bouchard@ca.kontron.com> and the current
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* Maintainer <mark.gross@intel.com>
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*
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* Description : This is the TELECOM CLOCK module driver for the ATCA
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* MPCBL0010 ATCA computer.
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*/
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#include <linux/config.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/sched.h>
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#include <linux/kernel.h> /* printk() */
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#include <linux/fs.h> /* everything... */
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#include <linux/errno.h> /* error codes */
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#include <linux/delay.h> /* udelay */
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#include <linux/slab.h>
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#include <linux/ioport.h>
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#include <linux/interrupt.h>
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#include <linux/spinlock.h>
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#include <linux/timer.h>
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#include <linux/sysfs.h>
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#include <linux/device.h>
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#include <linux/miscdevice.h>
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#include <linux/platform_device.h>
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#include <asm/io.h> /* inb/outb */
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#include <asm/uaccess.h>
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MODULE_AUTHOR("Sebastien Bouchard <sebastien.bouchard@ca.kontron.com>");
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MODULE_LICENSE("GPL");
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/*Hardware Reset of the PLL */
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#define RESET_ON 0x00
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#define RESET_OFF 0x01
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/* MODE SELECT */
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#define NORMAL_MODE 0x00
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#define HOLDOVER_MODE 0x10
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#define FREERUN_MODE 0x20
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/* FILTER SELECT */
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#define FILTER_6HZ 0x04
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#define FILTER_12HZ 0x00
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/* SELECT REFERENCE FREQUENCY */
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#define REF_CLK1_8kHz 0x00
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#define REF_CLK2_19_44MHz 0x02
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/* Select primary or secondary redundant clock */
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#define PRIMARY_CLOCK 0x00
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#define SECONDARY_CLOCK 0x01
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/* CLOCK TRANSMISSION DEFINE */
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#define CLK_8kHz 0xff
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#define CLK_16_384MHz 0xfb
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#define CLK_1_544MHz 0x00
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#define CLK_2_048MHz 0x01
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#define CLK_4_096MHz 0x02
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#define CLK_6_312MHz 0x03
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#define CLK_8_192MHz 0x04
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#define CLK_19_440MHz 0x06
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#define CLK_8_592MHz 0x08
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#define CLK_11_184MHz 0x09
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#define CLK_34_368MHz 0x0b
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#define CLK_44_736MHz 0x0a
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/* RECEIVED REFERENCE */
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#define AMC_B1 0
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#define AMC_B2 1
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/* HARDWARE SWITCHING DEFINE */
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#define HW_ENABLE 0x80
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#define HW_DISABLE 0x00
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/* HARDWARE SWITCHING MODE DEFINE */
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#define PLL_HOLDOVER 0x40
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#define LOST_CLOCK 0x00
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/* ALARMS DEFINE */
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#define UNLOCK_MASK 0x10
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#define HOLDOVER_MASK 0x20
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#define SEC_LOST_MASK 0x40
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#define PRI_LOST_MASK 0x80
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/* INTERRUPT CAUSE DEFINE */
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#define PRI_LOS_01_MASK 0x01
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#define PRI_LOS_10_MASK 0x02
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#define SEC_LOS_01_MASK 0x04
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#define SEC_LOS_10_MASK 0x08
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#define HOLDOVER_01_MASK 0x10
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#define HOLDOVER_10_MASK 0x20
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#define UNLOCK_01_MASK 0x40
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#define UNLOCK_10_MASK 0x80
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struct tlclk_alarms {
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__u32 lost_clocks;
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__u32 lost_primary_clock;
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__u32 lost_secondary_clock;
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__u32 primary_clock_back;
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__u32 secondary_clock_back;
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__u32 switchover_primary;
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__u32 switchover_secondary;
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__u32 pll_holdover;
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__u32 pll_end_holdover;
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__u32 pll_lost_sync;
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__u32 pll_sync;
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};
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/* Telecom clock I/O register definition */
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#define TLCLK_BASE 0xa08
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#define TLCLK_REG0 TLCLK_BASE
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#define TLCLK_REG1 (TLCLK_BASE+1)
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#define TLCLK_REG2 (TLCLK_BASE+2)
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#define TLCLK_REG3 (TLCLK_BASE+3)
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#define TLCLK_REG4 (TLCLK_BASE+4)
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#define TLCLK_REG5 (TLCLK_BASE+5)
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#define TLCLK_REG6 (TLCLK_BASE+6)
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#define TLCLK_REG7 (TLCLK_BASE+7)
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#define SET_PORT_BITS(port, mask, val) outb(((inb(port) & mask) | val), port)
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/* 0 = Dynamic allocation of the major device number */
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#define TLCLK_MAJOR 0
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/* sysfs interface definition:
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Upon loading the driver will create a sysfs directory under
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/sys/devices/platform/telco_clock.
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This directory exports the following interfaces. There operation is
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documented in the MCPBL0010 TPS under the Telecom Clock API section, 11.4.
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alarms :
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current_ref :
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enable_clk3a_output :
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enable_clk3b_output :
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enable_clka0_output :
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enable_clka1_output :
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enable_clkb0_output :
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enable_clkb1_output :
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filter_select :
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hardware_switching :
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hardware_switching_mode :
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interrupt_switch :
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mode_select :
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refalign :
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reset :
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select_amcb1_transmit_clock :
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select_amcb2_transmit_clock :
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select_redundant_clock :
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select_ref_frequency :
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test_mode :
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All sysfs interfaces are integers in hex format, i.e echo 99 > refalign
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has the same effect as echo 0x99 > refalign.
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*/
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static unsigned int telclk_interrupt;
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static int int_events; /* Event that generate a interrupt */
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static int got_event; /* if events processing have been done */
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static void switchover_timeout(unsigned long data);
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static struct timer_list switchover_timer =
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TIMER_INITIALIZER(switchover_timeout , 0, 0);
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static struct tlclk_alarms *alarm_events;
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static DEFINE_SPINLOCK(event_lock);
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static int tlclk_major = TLCLK_MAJOR;
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static irqreturn_t tlclk_interrupt(int irq, void *dev_id, struct pt_regs *regs);
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static DECLARE_WAIT_QUEUE_HEAD(wq);
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static int tlclk_open(struct inode *inode, struct file *filp)
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{
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int result;
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/* Make sure there is no interrupt pending while
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* initialising interrupt handler */
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inb(TLCLK_REG6);
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/* This device is wired through the FPGA IO space of the ATCA blade
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* we can't share this IRQ */
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result = request_irq(telclk_interrupt, &tlclk_interrupt,
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SA_INTERRUPT, "telco_clock", tlclk_interrupt);
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if (result == -EBUSY) {
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printk(KERN_ERR "tlclk: Interrupt can't be reserved.\n");
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return -EBUSY;
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}
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inb(TLCLK_REG6); /* Clear interrupt events */
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return 0;
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}
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static int tlclk_release(struct inode *inode, struct file *filp)
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{
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free_irq(telclk_interrupt, tlclk_interrupt);
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return 0;
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}
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ssize_t tlclk_read(struct file *filp, char __user *buf, size_t count,
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loff_t *f_pos)
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{
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if (count < sizeof(struct tlclk_alarms))
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return -EIO;
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wait_event_interruptible(wq, got_event);
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if (copy_to_user(buf, alarm_events, sizeof(struct tlclk_alarms)))
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return -EFAULT;
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memset(alarm_events, 0, sizeof(struct tlclk_alarms));
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got_event = 0;
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return sizeof(struct tlclk_alarms);
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}
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ssize_t tlclk_write(struct file *filp, const char __user *buf, size_t count,
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loff_t *f_pos)
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{
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return 0;
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}
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static struct file_operations tlclk_fops = {
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.read = tlclk_read,
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.write = tlclk_write,
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.open = tlclk_open,
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.release = tlclk_release,
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};
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static struct miscdevice tlclk_miscdev = {
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.minor = MISC_DYNAMIC_MINOR,
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.name = "telco_clock",
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.fops = &tlclk_fops,
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};
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static ssize_t show_current_ref(struct device *d,
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struct device_attribute *attr, char *buf)
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{
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unsigned long ret_val;
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unsigned long flags;
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spin_lock_irqsave(&event_lock, flags);
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ret_val = ((inb(TLCLK_REG1) & 0x08) >> 3);
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spin_unlock_irqrestore(&event_lock, flags);
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return sprintf(buf, "0x%lX\n", ret_val);
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}
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static DEVICE_ATTR(current_ref, S_IRUGO, show_current_ref, NULL);
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static ssize_t show_interrupt_switch(struct device *d,
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struct device_attribute *attr, char *buf)
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{
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unsigned long ret_val;
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unsigned long flags;
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spin_lock_irqsave(&event_lock, flags);
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ret_val = inb(TLCLK_REG6);
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spin_unlock_irqrestore(&event_lock, flags);
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return sprintf(buf, "0x%lX\n", ret_val);
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}
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static DEVICE_ATTR(interrupt_switch, S_IRUGO,
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show_interrupt_switch, NULL);
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static ssize_t show_alarms(struct device *d,
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struct device_attribute *attr, char *buf)
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{
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unsigned long ret_val;
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unsigned long flags;
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spin_lock_irqsave(&event_lock, flags);
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ret_val = (inb(TLCLK_REG2) & 0xf0);
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spin_unlock_irqrestore(&event_lock, flags);
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return sprintf(buf, "0x%lX\n", ret_val);
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}
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static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
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static ssize_t store_enable_clk3b_output(struct device *d,
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struct device_attribute *attr, const char *buf, size_t count)
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{
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unsigned long tmp;
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unsigned char val;
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unsigned long flags;
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sscanf(buf, "%lX", &tmp);
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dev_dbg(d, ": tmp = 0x%lX\n", tmp);
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val = (unsigned char)tmp;
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spin_lock_irqsave(&event_lock, flags);
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SET_PORT_BITS(TLCLK_REG3, 0x7f, val << 7);
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spin_unlock_irqrestore(&event_lock, flags);
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return strnlen(buf, count);
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}
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static DEVICE_ATTR(enable_clk3b_output, S_IWUGO, NULL,
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store_enable_clk3b_output);
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static ssize_t store_enable_clk3a_output(struct device *d,
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struct device_attribute *attr, const char *buf, size_t count)
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{
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unsigned long flags;
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unsigned long tmp;
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unsigned char val;
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sscanf(buf, "%lX", &tmp);
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dev_dbg(d, "tmp = 0x%lX\n", tmp);
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val = (unsigned char)tmp;
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spin_lock_irqsave(&event_lock, flags);
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SET_PORT_BITS(TLCLK_REG3, 0xbf, val << 6);
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spin_unlock_irqrestore(&event_lock, flags);
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return strnlen(buf, count);
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}
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static DEVICE_ATTR(enable_clk3a_output, S_IWUGO, NULL,
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store_enable_clk3a_output);
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static ssize_t store_enable_clkb1_output(struct device *d,
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struct device_attribute *attr, const char *buf, size_t count)
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{
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unsigned long flags;
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unsigned long tmp;
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unsigned char val;
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sscanf(buf, "%lX", &tmp);
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dev_dbg(d, "tmp = 0x%lX\n", tmp);
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val = (unsigned char)tmp;
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spin_lock_irqsave(&event_lock, flags);
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SET_PORT_BITS(TLCLK_REG2, 0xf7, val << 3);
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spin_unlock_irqrestore(&event_lock, flags);
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return strnlen(buf, count);
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}
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static DEVICE_ATTR(enable_clkb1_output, S_IWUGO, NULL,
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store_enable_clkb1_output);
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static ssize_t store_enable_clka1_output(struct device *d,
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struct device_attribute *attr, const char *buf, size_t count)
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{
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unsigned long flags;
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unsigned long tmp;
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unsigned char val;
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sscanf(buf, "%lX", &tmp);
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dev_dbg(d, "tmp = 0x%lX\n", tmp);
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val = (unsigned char)tmp;
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spin_lock_irqsave(&event_lock, flags);
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SET_PORT_BITS(TLCLK_REG2, 0xfb, val << 2);
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spin_unlock_irqrestore(&event_lock, flags);
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return strnlen(buf, count);
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}
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static DEVICE_ATTR(enable_clka1_output, S_IWUGO, NULL,
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store_enable_clka1_output);
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static ssize_t store_enable_clkb0_output(struct device *d,
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struct device_attribute *attr, const char *buf, size_t count)
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{
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unsigned long flags;
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unsigned long tmp;
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unsigned char val;
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sscanf(buf, "%lX", &tmp);
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dev_dbg(d, "tmp = 0x%lX\n", tmp);
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val = (unsigned char)tmp;
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spin_lock_irqsave(&event_lock, flags);
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SET_PORT_BITS(TLCLK_REG2, 0xfd, val << 1);
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spin_unlock_irqrestore(&event_lock, flags);
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return strnlen(buf, count);
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}
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static DEVICE_ATTR(enable_clkb0_output, S_IWUGO, NULL,
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store_enable_clkb0_output);
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static ssize_t store_enable_clka0_output(struct device *d,
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struct device_attribute *attr, const char *buf, size_t count)
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{
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unsigned long flags;
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unsigned long tmp;
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unsigned char val;
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sscanf(buf, "%lX", &tmp);
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dev_dbg(d, "tmp = 0x%lX\n", tmp);
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val = (unsigned char)tmp;
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spin_lock_irqsave(&event_lock, flags);
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SET_PORT_BITS(TLCLK_REG2, 0xfe, val);
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spin_unlock_irqrestore(&event_lock, flags);
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return strnlen(buf, count);
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}
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static DEVICE_ATTR(enable_clka0_output, S_IWUGO, NULL,
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store_enable_clka0_output);
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static ssize_t store_test_mode(struct device *d,
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struct device_attribute *attr, const char *buf, size_t count)
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{
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unsigned long flags;
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unsigned long tmp;
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unsigned char val;
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sscanf(buf, "%lX", &tmp);
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dev_dbg(d, "tmp = 0x%lX\n", tmp);
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val = (unsigned char)tmp;
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spin_lock_irqsave(&event_lock, flags);
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SET_PORT_BITS(TLCLK_REG4, 0xfd, 2);
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spin_unlock_irqrestore(&event_lock, flags);
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return strnlen(buf, count);
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}
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static DEVICE_ATTR(test_mode, S_IWUGO, NULL, store_test_mode);
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static ssize_t store_select_amcb2_transmit_clock(struct device *d,
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struct device_attribute *attr, const char *buf, size_t count)
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{
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unsigned long flags;
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unsigned long tmp;
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unsigned char val;
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sscanf(buf, "%lX", &tmp);
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dev_dbg(d, "tmp = 0x%lX\n", tmp);
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val = (unsigned char)tmp;
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spin_lock_irqsave(&event_lock, flags);
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if ((val == CLK_8kHz) || (val == CLK_16_384MHz)) {
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SET_PORT_BITS(TLCLK_REG3, 0xc7, 0x28);
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SET_PORT_BITS(TLCLK_REG1, 0xfb, ~val);
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} else if (val >= CLK_8_592MHz) {
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SET_PORT_BITS(TLCLK_REG3, 0xc7, 0x38);
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switch (val) {
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case CLK_8_592MHz:
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SET_PORT_BITS(TLCLK_REG0, 0xfc, 1);
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break;
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case CLK_11_184MHz:
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SET_PORT_BITS(TLCLK_REG0, 0xfc, 0);
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break;
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case CLK_34_368MHz:
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SET_PORT_BITS(TLCLK_REG0, 0xfc, 3);
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break;
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case CLK_44_736MHz:
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SET_PORT_BITS(TLCLK_REG0, 0xfc, 2);
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break;
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}
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} else
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SET_PORT_BITS(TLCLK_REG3, 0xc7, val << 3);
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spin_unlock_irqrestore(&event_lock, flags);
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return strnlen(buf, count);
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}
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static DEVICE_ATTR(select_amcb2_transmit_clock, S_IWUGO, NULL,
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store_select_amcb2_transmit_clock);
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|
static ssize_t store_select_amcb1_transmit_clock(struct device *d,
|
|
struct device_attribute *attr, const char *buf, size_t count)
|
|
{
|
|
unsigned long tmp;
|
|
unsigned char val;
|
|
unsigned long flags;
|
|
|
|
sscanf(buf, "%lX", &tmp);
|
|
dev_dbg(d, "tmp = 0x%lX\n", tmp);
|
|
|
|
val = (unsigned char)tmp;
|
|
spin_lock_irqsave(&event_lock, flags);
|
|
if ((val == CLK_8kHz) || (val == CLK_16_384MHz)) {
|
|
SET_PORT_BITS(TLCLK_REG3, 0xf8, 0x5);
|
|
SET_PORT_BITS(TLCLK_REG1, 0xfb, ~val);
|
|
} else if (val >= CLK_8_592MHz) {
|
|
SET_PORT_BITS(TLCLK_REG3, 0xf8, 0x7);
|
|
switch (val) {
|
|
case CLK_8_592MHz:
|
|
SET_PORT_BITS(TLCLK_REG0, 0xfc, 1);
|
|
break;
|
|
case CLK_11_184MHz:
|
|
SET_PORT_BITS(TLCLK_REG0, 0xfc, 0);
|
|
break;
|
|
case CLK_34_368MHz:
|
|
SET_PORT_BITS(TLCLK_REG0, 0xfc, 3);
|
|
break;
|
|
case CLK_44_736MHz:
|
|
SET_PORT_BITS(TLCLK_REG0, 0xfc, 2);
|
|
break;
|
|
}
|
|
} else
|
|
SET_PORT_BITS(TLCLK_REG3, 0xf8, val);
|
|
spin_unlock_irqrestore(&event_lock, flags);
|
|
|
|
return strnlen(buf, count);
|
|
}
|
|
|
|
static DEVICE_ATTR(select_amcb1_transmit_clock, S_IWUGO, NULL,
|
|
store_select_amcb1_transmit_clock);
|
|
|
|
static ssize_t store_select_redundant_clock(struct device *d,
|
|
struct device_attribute *attr, const char *buf, size_t count)
|
|
{
|
|
unsigned long tmp;
|
|
unsigned char val;
|
|
unsigned long flags;
|
|
|
|
sscanf(buf, "%lX", &tmp);
|
|
dev_dbg(d, "tmp = 0x%lX\n", tmp);
|
|
|
|
val = (unsigned char)tmp;
|
|
spin_lock_irqsave(&event_lock, flags);
|
|
SET_PORT_BITS(TLCLK_REG1, 0xfe, val);
|
|
spin_unlock_irqrestore(&event_lock, flags);
|
|
|
|
return strnlen(buf, count);
|
|
}
|
|
|
|
static DEVICE_ATTR(select_redundant_clock, S_IWUGO, NULL,
|
|
store_select_redundant_clock);
|
|
|
|
static ssize_t store_select_ref_frequency(struct device *d,
|
|
struct device_attribute *attr, const char *buf, size_t count)
|
|
{
|
|
unsigned long tmp;
|
|
unsigned char val;
|
|
unsigned long flags;
|
|
|
|
sscanf(buf, "%lX", &tmp);
|
|
dev_dbg(d, "tmp = 0x%lX\n", tmp);
|
|
|
|
val = (unsigned char)tmp;
|
|
spin_lock_irqsave(&event_lock, flags);
|
|
SET_PORT_BITS(TLCLK_REG1, 0xfd, val);
|
|
spin_unlock_irqrestore(&event_lock, flags);
|
|
|
|
return strnlen(buf, count);
|
|
}
|
|
|
|
static DEVICE_ATTR(select_ref_frequency, S_IWUGO, NULL,
|
|
store_select_ref_frequency);
|
|
|
|
static ssize_t store_filter_select(struct device *d,
|
|
struct device_attribute *attr, const char *buf, size_t count)
|
|
{
|
|
unsigned long tmp;
|
|
unsigned char val;
|
|
unsigned long flags;
|
|
|
|
sscanf(buf, "%lX", &tmp);
|
|
dev_dbg(d, "tmp = 0x%lX\n", tmp);
|
|
|
|
val = (unsigned char)tmp;
|
|
spin_lock_irqsave(&event_lock, flags);
|
|
SET_PORT_BITS(TLCLK_REG0, 0xfb, val);
|
|
spin_unlock_irqrestore(&event_lock, flags);
|
|
|
|
return strnlen(buf, count);
|
|
}
|
|
|
|
static DEVICE_ATTR(filter_select, S_IWUGO, NULL, store_filter_select);
|
|
|
|
static ssize_t store_hardware_switching_mode(struct device *d,
|
|
struct device_attribute *attr, const char *buf, size_t count)
|
|
{
|
|
unsigned long tmp;
|
|
unsigned char val;
|
|
unsigned long flags;
|
|
|
|
sscanf(buf, "%lX", &tmp);
|
|
dev_dbg(d, "tmp = 0x%lX\n", tmp);
|
|
|
|
val = (unsigned char)tmp;
|
|
spin_lock_irqsave(&event_lock, flags);
|
|
SET_PORT_BITS(TLCLK_REG0, 0xbf, val);
|
|
spin_unlock_irqrestore(&event_lock, flags);
|
|
|
|
return strnlen(buf, count);
|
|
}
|
|
|
|
static DEVICE_ATTR(hardware_switching_mode, S_IWUGO, NULL,
|
|
store_hardware_switching_mode);
|
|
|
|
static ssize_t store_hardware_switching(struct device *d,
|
|
struct device_attribute *attr, const char *buf, size_t count)
|
|
{
|
|
unsigned long tmp;
|
|
unsigned char val;
|
|
unsigned long flags;
|
|
|
|
sscanf(buf, "%lX", &tmp);
|
|
dev_dbg(d, "tmp = 0x%lX\n", tmp);
|
|
|
|
val = (unsigned char)tmp;
|
|
spin_lock_irqsave(&event_lock, flags);
|
|
SET_PORT_BITS(TLCLK_REG0, 0x7f, val);
|
|
spin_unlock_irqrestore(&event_lock, flags);
|
|
|
|
return strnlen(buf, count);
|
|
}
|
|
|
|
static DEVICE_ATTR(hardware_switching, S_IWUGO, NULL,
|
|
store_hardware_switching);
|
|
|
|
static ssize_t store_refalign (struct device *d,
|
|
struct device_attribute *attr, const char *buf, size_t count)
|
|
{
|
|
unsigned long tmp;
|
|
unsigned long flags;
|
|
|
|
sscanf(buf, "%lX", &tmp);
|
|
dev_dbg(d, "tmp = 0x%lX\n", tmp);
|
|
spin_lock_irqsave(&event_lock, flags);
|
|
SET_PORT_BITS(TLCLK_REG0, 0xf7, 0);
|
|
udelay(2);
|
|
SET_PORT_BITS(TLCLK_REG0, 0xf7, 0x08);
|
|
udelay(2);
|
|
SET_PORT_BITS(TLCLK_REG0, 0xf7, 0);
|
|
spin_unlock_irqrestore(&event_lock, flags);
|
|
|
|
return strnlen(buf, count);
|
|
}
|
|
|
|
static DEVICE_ATTR(refalign, S_IWUGO, NULL, store_refalign);
|
|
|
|
static ssize_t store_mode_select (struct device *d,
|
|
struct device_attribute *attr, const char *buf, size_t count)
|
|
{
|
|
unsigned long tmp;
|
|
unsigned char val;
|
|
unsigned long flags;
|
|
|
|
sscanf(buf, "%lX", &tmp);
|
|
dev_dbg(d, "tmp = 0x%lX\n", tmp);
|
|
|
|
val = (unsigned char)tmp;
|
|
spin_lock_irqsave(&event_lock, flags);
|
|
SET_PORT_BITS(TLCLK_REG0, 0xcf, val);
|
|
spin_unlock_irqrestore(&event_lock, flags);
|
|
|
|
return strnlen(buf, count);
|
|
}
|
|
|
|
static DEVICE_ATTR(mode_select, S_IWUGO, NULL, store_mode_select);
|
|
|
|
static ssize_t store_reset (struct device *d,
|
|
struct device_attribute *attr, const char *buf, size_t count)
|
|
{
|
|
unsigned long tmp;
|
|
unsigned char val;
|
|
unsigned long flags;
|
|
|
|
sscanf(buf, "%lX", &tmp);
|
|
dev_dbg(d, "tmp = 0x%lX\n", tmp);
|
|
|
|
val = (unsigned char)tmp;
|
|
spin_lock_irqsave(&event_lock, flags);
|
|
SET_PORT_BITS(TLCLK_REG4, 0xfd, val);
|
|
spin_unlock_irqrestore(&event_lock, flags);
|
|
|
|
return strnlen(buf, count);
|
|
}
|
|
|
|
static DEVICE_ATTR(reset, S_IWUGO, NULL, store_reset);
|
|
|
|
static struct attribute *tlclk_sysfs_entries[] = {
|
|
&dev_attr_current_ref.attr,
|
|
&dev_attr_interrupt_switch.attr,
|
|
&dev_attr_alarms.attr,
|
|
&dev_attr_enable_clk3a_output.attr,
|
|
&dev_attr_enable_clk3b_output.attr,
|
|
&dev_attr_enable_clkb1_output.attr,
|
|
&dev_attr_enable_clka1_output.attr,
|
|
&dev_attr_enable_clkb0_output.attr,
|
|
&dev_attr_enable_clka0_output.attr,
|
|
&dev_attr_test_mode.attr,
|
|
&dev_attr_select_amcb1_transmit_clock.attr,
|
|
&dev_attr_select_amcb2_transmit_clock.attr,
|
|
&dev_attr_select_redundant_clock.attr,
|
|
&dev_attr_select_ref_frequency.attr,
|
|
&dev_attr_filter_select.attr,
|
|
&dev_attr_hardware_switching_mode.attr,
|
|
&dev_attr_hardware_switching.attr,
|
|
&dev_attr_refalign.attr,
|
|
&dev_attr_mode_select.attr,
|
|
&dev_attr_reset.attr,
|
|
NULL
|
|
};
|
|
|
|
static struct attribute_group tlclk_attribute_group = {
|
|
.name = NULL, /* put in device directory */
|
|
.attrs = tlclk_sysfs_entries,
|
|
};
|
|
|
|
static struct platform_device *tlclk_device;
|
|
|
|
static int __init tlclk_init(void)
|
|
{
|
|
int ret;
|
|
|
|
ret = register_chrdev(tlclk_major, "telco_clock", &tlclk_fops);
|
|
if (ret < 0) {
|
|
printk(KERN_ERR "tlclk: can't get major %d.\n", tlclk_major);
|
|
return ret;
|
|
}
|
|
alarm_events = kzalloc( sizeof(struct tlclk_alarms), GFP_KERNEL);
|
|
if (!alarm_events)
|
|
goto out1;
|
|
|
|
/* Read telecom clock IRQ number (Set by BIOS) */
|
|
if (!request_region(TLCLK_BASE, 8, "telco_clock")) {
|
|
printk(KERN_ERR "tlclk: request_region 0x%X failed.\n",
|
|
TLCLK_BASE);
|
|
ret = -EBUSY;
|
|
goto out2;
|
|
}
|
|
telclk_interrupt = (inb(TLCLK_REG7) & 0x0f);
|
|
|
|
if (0x0F == telclk_interrupt ) { /* not MCPBL0010 ? */
|
|
printk(KERN_ERR "telclk_interrup = 0x%x non-mcpbl0010 hw.\n",
|
|
telclk_interrupt);
|
|
ret = -ENXIO;
|
|
goto out3;
|
|
}
|
|
|
|
init_timer(&switchover_timer);
|
|
|
|
ret = misc_register(&tlclk_miscdev);
|
|
if (ret < 0) {
|
|
printk(KERN_ERR "tlclk: misc_register returns %d.\n", ret);
|
|
ret = -EBUSY;
|
|
goto out3;
|
|
}
|
|
|
|
tlclk_device = platform_device_register_simple("telco_clock",
|
|
-1, NULL, 0);
|
|
if (!tlclk_device) {
|
|
printk(KERN_ERR "tlclk: platform_device_register failed.\n");
|
|
ret = -EBUSY;
|
|
goto out4;
|
|
}
|
|
|
|
ret = sysfs_create_group(&tlclk_device->dev.kobj,
|
|
&tlclk_attribute_group);
|
|
if (ret) {
|
|
printk(KERN_ERR "tlclk: failed to create sysfs device attributes.\n");
|
|
sysfs_remove_group(&tlclk_device->dev.kobj,
|
|
&tlclk_attribute_group);
|
|
goto out5;
|
|
}
|
|
|
|
return 0;
|
|
out5:
|
|
platform_device_unregister(tlclk_device);
|
|
out4:
|
|
misc_deregister(&tlclk_miscdev);
|
|
out3:
|
|
release_region(TLCLK_BASE, 8);
|
|
out2:
|
|
kfree(alarm_events);
|
|
out1:
|
|
unregister_chrdev(tlclk_major, "telco_clock");
|
|
return ret;
|
|
}
|
|
|
|
static void __exit tlclk_cleanup(void)
|
|
{
|
|
sysfs_remove_group(&tlclk_device->dev.kobj, &tlclk_attribute_group);
|
|
platform_device_unregister(tlclk_device);
|
|
misc_deregister(&tlclk_miscdev);
|
|
unregister_chrdev(tlclk_major, "telco_clock");
|
|
|
|
release_region(TLCLK_BASE, 8);
|
|
del_timer_sync(&switchover_timer);
|
|
kfree(alarm_events);
|
|
|
|
}
|
|
|
|
static void switchover_timeout(unsigned long data)
|
|
{
|
|
if ((data & 1)) {
|
|
if ((inb(TLCLK_REG1) & 0x08) != (data & 0x08))
|
|
alarm_events->switchover_primary++;
|
|
} else {
|
|
if ((inb(TLCLK_REG1) & 0x08) != (data & 0x08))
|
|
alarm_events->switchover_secondary++;
|
|
}
|
|
|
|
/* Alarm processing is done, wake up read task */
|
|
del_timer(&switchover_timer);
|
|
got_event = 1;
|
|
wake_up(&wq);
|
|
}
|
|
|
|
static irqreturn_t tlclk_interrupt(int irq, void *dev_id, struct pt_regs *regs)
|
|
{
|
|
unsigned long flags;
|
|
|
|
spin_lock_irqsave(&event_lock, flags);
|
|
/* Read and clear interrupt events */
|
|
int_events = inb(TLCLK_REG6);
|
|
|
|
/* Primary_Los changed from 0 to 1 ? */
|
|
if (int_events & PRI_LOS_01_MASK) {
|
|
if (inb(TLCLK_REG2) & SEC_LOST_MASK)
|
|
alarm_events->lost_clocks++;
|
|
else
|
|
alarm_events->lost_primary_clock++;
|
|
}
|
|
|
|
/* Primary_Los changed from 1 to 0 ? */
|
|
if (int_events & PRI_LOS_10_MASK) {
|
|
alarm_events->primary_clock_back++;
|
|
SET_PORT_BITS(TLCLK_REG1, 0xFE, 1);
|
|
}
|
|
/* Secondary_Los changed from 0 to 1 ? */
|
|
if (int_events & SEC_LOS_01_MASK) {
|
|
if (inb(TLCLK_REG2) & PRI_LOST_MASK)
|
|
alarm_events->lost_clocks++;
|
|
else
|
|
alarm_events->lost_secondary_clock++;
|
|
}
|
|
/* Secondary_Los changed from 1 to 0 ? */
|
|
if (int_events & SEC_LOS_10_MASK) {
|
|
alarm_events->secondary_clock_back++;
|
|
SET_PORT_BITS(TLCLK_REG1, 0xFE, 0);
|
|
}
|
|
if (int_events & HOLDOVER_10_MASK)
|
|
alarm_events->pll_end_holdover++;
|
|
|
|
if (int_events & UNLOCK_01_MASK)
|
|
alarm_events->pll_lost_sync++;
|
|
|
|
if (int_events & UNLOCK_10_MASK)
|
|
alarm_events->pll_sync++;
|
|
|
|
/* Holdover changed from 0 to 1 ? */
|
|
if (int_events & HOLDOVER_01_MASK) {
|
|
alarm_events->pll_holdover++;
|
|
|
|
/* TIMEOUT in ~10ms */
|
|
switchover_timer.expires = jiffies + msecs_to_jiffies(10);
|
|
switchover_timer.data = inb(TLCLK_REG1);
|
|
add_timer(&switchover_timer);
|
|
} else {
|
|
got_event = 1;
|
|
wake_up(&wq);
|
|
}
|
|
spin_unlock_irqrestore(&event_lock, flags);
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
module_init(tlclk_init);
|
|
module_exit(tlclk_cleanup);
|