mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-05 21:26:39 +07:00
600f7cfebe
Makes use of the proc_comm interface to provide clock control on MSM7X01A family SoCs. Signed-off-by: Brian Swetland <swetland@google.com>
219 lines
4.8 KiB
C
219 lines
4.8 KiB
C
/* arch/arm/mach-msm/clock.c
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*
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* Copyright (C) 2007 Google, Inc.
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* Copyright (c) 2007 QUALCOMM Incorporated
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/version.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/list.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <linux/spinlock.h>
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#include "clock.h"
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#include "proc_comm.h"
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static DEFINE_MUTEX(clocks_mutex);
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static DEFINE_SPINLOCK(clocks_lock);
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static LIST_HEAD(clocks);
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/*
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* glue for the proc_comm interface
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*/
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static inline int pc_clk_enable(unsigned id)
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{
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return msm_proc_comm(PCOM_CLKCTL_RPC_ENABLE, &id, NULL);
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}
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static inline void pc_clk_disable(unsigned id)
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{
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msm_proc_comm(PCOM_CLKCTL_RPC_DISABLE, &id, NULL);
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}
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static inline int pc_clk_set_rate(unsigned id, unsigned rate)
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{
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return msm_proc_comm(PCOM_CLKCTL_RPC_SET_RATE, &id, &rate);
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}
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static inline int pc_clk_set_min_rate(unsigned id, unsigned rate)
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{
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return msm_proc_comm(PCOM_CLKCTL_RPC_MIN_RATE, &id, &rate);
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}
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static inline int pc_clk_set_max_rate(unsigned id, unsigned rate)
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{
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return msm_proc_comm(PCOM_CLKCTL_RPC_MAX_RATE, &id, &rate);
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}
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static inline int pc_clk_set_flags(unsigned id, unsigned flags)
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{
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return msm_proc_comm(PCOM_CLKCTL_RPC_SET_FLAGS, &id, &flags);
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}
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static inline unsigned pc_clk_get_rate(unsigned id)
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{
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if (msm_proc_comm(PCOM_CLKCTL_RPC_RATE, &id, NULL))
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return 0;
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else
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return id;
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}
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static inline unsigned pc_clk_is_enabled(unsigned id)
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{
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if (msm_proc_comm(PCOM_CLKCTL_RPC_ENABLED, &id, NULL))
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return 0;
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else
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return id;
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}
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static inline int pc_pll_request(unsigned id, unsigned on)
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{
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on = !!on;
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return msm_proc_comm(PCOM_CLKCTL_RPC_PLL_REQUEST, &id, &on);
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}
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/*
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* Standard clock functions defined in include/linux/clk.h
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*/
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struct clk *clk_get(struct device *dev, const char *id)
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{
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struct clk *clk;
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mutex_lock(&clocks_mutex);
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list_for_each_entry(clk, &clocks, list)
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if (!strcmp(id, clk->name) && clk->dev == dev)
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goto found_it;
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list_for_each_entry(clk, &clocks, list)
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if (!strcmp(id, clk->name) && clk->dev == NULL)
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goto found_it;
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clk = ERR_PTR(-ENOENT);
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found_it:
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mutex_unlock(&clocks_mutex);
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return clk;
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}
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EXPORT_SYMBOL(clk_get);
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void clk_put(struct clk *clk)
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{
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}
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EXPORT_SYMBOL(clk_put);
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int clk_enable(struct clk *clk)
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{
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unsigned long flags;
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spin_lock_irqsave(&clocks_lock, flags);
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clk->count++;
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if (clk->count == 1)
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pc_clk_enable(clk->id);
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spin_unlock_irqrestore(&clocks_lock, flags);
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return 0;
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}
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EXPORT_SYMBOL(clk_enable);
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void clk_disable(struct clk *clk)
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{
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unsigned long flags;
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spin_lock_irqsave(&clocks_lock, flags);
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BUG_ON(clk->count == 0);
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clk->count--;
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if (clk->count == 0)
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pc_clk_disable(clk->id);
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spin_unlock_irqrestore(&clocks_lock, flags);
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}
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EXPORT_SYMBOL(clk_disable);
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unsigned long clk_get_rate(struct clk *clk)
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{
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return pc_clk_get_rate(clk->id);
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}
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EXPORT_SYMBOL(clk_get_rate);
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int clk_set_rate(struct clk *clk, unsigned long rate)
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{
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int ret;
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if (clk->flags & CLKFLAG_USE_MIN_MAX_TO_SET) {
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ret = pc_clk_set_max_rate(clk->id, rate);
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if (ret)
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return ret;
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return pc_clk_set_min_rate(clk->id, rate);
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}
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return pc_clk_set_rate(clk->id, rate);
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}
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EXPORT_SYMBOL(clk_set_rate);
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int clk_set_parent(struct clk *clk, struct clk *parent)
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{
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return -ENOSYS;
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}
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EXPORT_SYMBOL(clk_set_parent);
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struct clk *clk_get_parent(struct clk *clk)
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{
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return ERR_PTR(-ENOSYS);
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}
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EXPORT_SYMBOL(clk_get_parent);
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int clk_set_flags(struct clk *clk, unsigned long flags)
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{
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if (clk == NULL || IS_ERR(clk))
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return -EINVAL;
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return pc_clk_set_flags(clk->id, flags);
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}
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EXPORT_SYMBOL(clk_set_flags);
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void __init msm_clock_init(void)
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{
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unsigned n;
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spin_lock_init(&clocks_lock);
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mutex_lock(&clocks_mutex);
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for (n = 0; n < msm_num_clocks; n++)
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list_add_tail(&msm_clocks[n].list, &clocks);
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mutex_unlock(&clocks_mutex);
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}
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/* The bootloader and/or AMSS may have left various clocks enabled.
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* Disable any clocks that belong to us (CLKFLAG_AUTO_OFF) but have
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* not been explicitly enabled by a clk_enable() call.
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*/
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static int __init clock_late_init(void)
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{
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unsigned long flags;
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struct clk *clk;
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unsigned count = 0;
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mutex_lock(&clocks_mutex);
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list_for_each_entry(clk, &clocks, list) {
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if (clk->flags & CLKFLAG_AUTO_OFF) {
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spin_lock_irqsave(&clocks_lock, flags);
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if (!clk->count) {
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count++;
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pc_clk_disable(clk->id);
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}
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spin_unlock_irqrestore(&clocks_lock, flags);
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}
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}
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mutex_unlock(&clocks_mutex);
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pr_info("clock_late_init() disabled %d unused clocks\n", count);
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return 0;
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}
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late_initcall(clock_late_init);
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