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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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7733f6c32e
This patch introduce new Cadence USBSS DRD driver to Linux kernel. The Cadence USBSS DRD Controller is a highly configurable IP Core which can be instantiated as Dual-Role Device (DRD), Peripheral Only and Host Only (XHCI)configurations. The current driver has been validated with FPGA platform. We have support for PCIe bus, which is used on FPGA prototyping. The host side of USBSS-DRD controller is compliant with XHCI specification, so it works with standard XHCI Linux driver. Signed-off-by: Pawel Laszczak <pawell@cadence.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
168 lines
4.3 KiB
C
168 lines
4.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Cadence USB3 DRD header file.
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*
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* Copyright (C) 2018-2019 Cadence.
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*
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* Author: Pawel Laszczak <pawell@cadence.com>
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*/
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#ifndef __LINUX_CDNS3_DRD
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#define __LINUX_CDNS3_DRD
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#include <linux/usb/otg.h>
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#include <linux/phy/phy.h>
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#include "core.h"
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/* DRD register interface for version v1. */
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struct cdns3_otg_regs {
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__le32 did;
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__le32 rid;
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__le32 capabilities;
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__le32 reserved1;
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__le32 cmd;
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__le32 sts;
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__le32 state;
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__le32 reserved2;
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__le32 ien;
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__le32 ivect;
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__le32 refclk;
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__le32 tmr;
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__le32 reserved3[4];
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__le32 simulate;
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__le32 override;
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__le32 susp_ctrl;
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__le32 reserved4;
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__le32 anasts;
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__le32 adp_ramp_time;
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__le32 ctrl1;
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__le32 ctrl2;
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};
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/* DRD register interface for version v0. */
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struct cdns3_otg_legacy_regs {
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__le32 cmd;
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__le32 sts;
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__le32 state;
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__le32 refclk;
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__le32 ien;
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__le32 ivect;
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__le32 reserved1[3];
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__le32 tmr;
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__le32 reserved2[2];
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__le32 version;
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__le32 capabilities;
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__le32 reserved3[2];
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__le32 simulate;
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__le32 reserved4[5];
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__le32 ctrl1;
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};
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/*
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* Common registers interface for both version of DRD.
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*/
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struct cdns3_otg_common_regs {
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__le32 cmd;
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__le32 sts;
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__le32 state;
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__le32 different1;
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__le32 ien;
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__le32 ivect;
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};
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/* CDNS_RID - bitmasks */
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#define CDNS_RID(p) ((p) & GENMASK(15, 0))
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/* CDNS_VID - bitmasks */
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#define CDNS_DID(p) ((p) & GENMASK(31, 0))
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/* OTGCMD - bitmasks */
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/* "Request the bus for Device mode. */
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#define OTGCMD_DEV_BUS_REQ BIT(0)
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/* Request the bus for Host mode */
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#define OTGCMD_HOST_BUS_REQ BIT(1)
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/* Enable OTG mode. */
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#define OTGCMD_OTG_EN BIT(2)
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/* Disable OTG mode */
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#define OTGCMD_OTG_DIS BIT(3)
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/*"Configure OTG as A-Device. */
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#define OTGCMD_A_DEV_EN BIT(4)
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/*"Configure OTG as A-Device. */
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#define OTGCMD_A_DEV_DIS BIT(5)
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/* Drop the bus for Device mod e. */
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#define OTGCMD_DEV_BUS_DROP BIT(8)
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/* Drop the bus for Host mode*/
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#define OTGCMD_HOST_BUS_DROP BIT(9)
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/* Power Down USBSS-DEV. */
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#define OTGCMD_DEV_POWER_OFF BIT(11)
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/* Power Down CDNSXHCI. */
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#define OTGCMD_HOST_POWER_OFF BIT(12)
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/* OTGIEN - bitmasks */
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/* ID change interrupt enable */
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#define OTGIEN_ID_CHANGE_INT BIT(0)
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/* Vbusvalid fall detected interrupt enable.*/
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#define OTGIEN_VBUSVALID_RISE_INT BIT(4)
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/* Vbusvalid fall detected interrupt enable */
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#define OTGIEN_VBUSVALID_FALL_INT BIT(5)
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/* OTGSTS - bitmasks */
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/*
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* Current value of the ID pin. It is only valid when idpullup in
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* OTGCTRL1_TYPE register is set to '1'.
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*/
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#define OTGSTS_ID_VALUE BIT(0)
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/* Current value of the vbus_valid */
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#define OTGSTS_VBUS_VALID BIT(1)
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/* Current value of the b_sess_vld */
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#define OTGSTS_SESSION_VALID BIT(2)
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/*Device mode is active*/
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#define OTGSTS_DEV_ACTIVE BIT(3)
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/* Host mode is active. */
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#define OTGSTS_HOST_ACTIVE BIT(4)
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/* OTG Controller not ready. */
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#define OTGSTS_OTG_NRDY_MASK BIT(11)
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#define OTGSTS_OTG_NRDY(p) ((p) & OTGSTS_OTG_NRDY_MASK)
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/*
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* Value of the strap pins.
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* 000 - no default configuration
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* 010 - Controller initiall configured as Host
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* 100 - Controller initially configured as Device
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*/
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#define OTGSTS_STRAP(p) (((p) & GENMASK(14, 12)) >> 12)
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#define OTGSTS_STRAP_NO_DEFAULT_CFG 0x00
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#define OTGSTS_STRAP_HOST_OTG 0x01
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#define OTGSTS_STRAP_HOST 0x02
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#define OTGSTS_STRAP_GADGET 0x04
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/* Host mode is turned on. */
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#define OTGSTS_XHCI_READY BIT(26)
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/* "Device mode is turned on .*/
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#define OTGSTS_DEV_READY BIT(27)
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/* OTGSTATE- bitmasks */
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#define OTGSTATE_DEV_STATE_MASK GENMASK(2, 0)
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#define OTGSTATE_HOST_STATE_MASK GENMASK(5, 3)
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#define OTGSTATE_HOST_STATE_IDLE 0x0
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#define OTGSTATE_HOST_STATE_VBUS_FALL 0x7
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#define OTGSTATE_HOST_STATE(p) (((p) & OTGSTATE_HOST_STATE_MASK) >> 3)
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/* OTGREFCLK - bitmasks */
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#define OTGREFCLK_STB_CLK_SWITCH_EN BIT(31)
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/* OVERRIDE - bitmasks */
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#define OVERRIDE_IDPULLUP BIT(0)
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/* Only for CDNS3_CONTROLLER_V0 version */
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#define OVERRIDE_IDPULLUP_V0 BIT(24)
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int cdns3_is_host(struct cdns3 *cdns);
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int cdns3_is_device(struct cdns3 *cdns);
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int cdns3_get_id(struct cdns3 *cdns);
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int cdns3_get_vbus(struct cdns3 *cdns);
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int cdns3_drd_init(struct cdns3 *cdns);
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int cdns3_drd_exit(struct cdns3 *cdns);
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int cdns3_drd_update_mode(struct cdns3 *cdns);
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int cdns3_drd_switch_gadget(struct cdns3 *cdns, int on);
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int cdns3_drd_switch_host(struct cdns3 *cdns, int on);
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int cdns3_set_mode(struct cdns3 *cdns, enum usb_dr_mode mode);
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#endif /* __LINUX_CDNS3_DRD */
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