mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-15 14:36:46 +07:00
1791f91bc7
Remove several unused (or software config only) properties. Rename marvel node to "system-controller". Also, rename the "block-index" property to "cell-index" to conform to current practice. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Dale Farnsworth <dale@farnsworth.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
170 lines
4.0 KiB
C
170 lines
4.0 KiB
C
/*
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* MPSC/UART driver for the Marvell mv64360, mv64460, ...
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*
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* Author: Mark A. Greer <mgreer@mvista.com>
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*
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* 2007 (c) MontaVista Software, Inc. This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*/
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#include <stdarg.h>
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#include <stddef.h>
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#include "types.h"
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#include "string.h"
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#include "stdio.h"
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#include "io.h"
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#include "ops.h"
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#define MPSC_CHR_1 0x000c
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#define MPSC_CHR_2 0x0010
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#define MPSC_CHR_2_TA (1<<7)
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#define MPSC_CHR_2_TCS (1<<9)
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#define MPSC_CHR_2_RA (1<<23)
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#define MPSC_CHR_2_CRD (1<<25)
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#define MPSC_CHR_2_EH (1<<31)
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#define MPSC_CHR_4 0x0018
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#define MPSC_CHR_4_Z (1<<29)
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#define MPSC_CHR_5 0x001c
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#define MPSC_CHR_5_CTL1_INTR (1<<12)
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#define MPSC_CHR_5_CTL1_VALID (1<<15)
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#define MPSC_CHR_10 0x0030
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#define MPSC_INTR_CAUSE 0x0000
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#define MPSC_INTR_CAUSE_RCC (1<<6)
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#define MPSC_INTR_MASK 0x0080
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#define SDMA_SDCM 0x0008
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#define SDMA_SDCM_AR (1<<15)
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#define SDMA_SDCM_AT (1<<31)
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static volatile char *mpsc_base;
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static volatile char *mpscintr_base;
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static u32 chr1, chr2;
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static int mpsc_open(void)
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{
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chr1 = in_le32((u32 *)(mpsc_base + MPSC_CHR_1)) & 0x00ff0000;
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chr2 = in_le32((u32 *)(mpsc_base + MPSC_CHR_2)) & ~(MPSC_CHR_2_TA
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| MPSC_CHR_2_TCS | MPSC_CHR_2_RA | MPSC_CHR_2_CRD
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| MPSC_CHR_2_EH);
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out_le32((u32 *)(mpsc_base + MPSC_CHR_4), MPSC_CHR_4_Z);
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out_le32((u32 *)(mpsc_base + MPSC_CHR_5),
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MPSC_CHR_5_CTL1_INTR | MPSC_CHR_5_CTL1_VALID);
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out_le32((u32 *)(mpsc_base + MPSC_CHR_2), chr2 | MPSC_CHR_2_EH);
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return 0;
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}
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static void mpsc_putc(unsigned char c)
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{
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while (in_le32((u32 *)(mpsc_base + MPSC_CHR_2)) & MPSC_CHR_2_TCS);
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out_le32((u32 *)(mpsc_base + MPSC_CHR_1), chr1 | c);
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out_le32((u32 *)(mpsc_base + MPSC_CHR_2), chr2 | MPSC_CHR_2_TCS);
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}
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static unsigned char mpsc_getc(void)
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{
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u32 cause = 0;
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unsigned char c;
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while (!(cause & MPSC_INTR_CAUSE_RCC))
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cause = in_le32((u32 *)(mpscintr_base + MPSC_INTR_CAUSE));
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c = in_8((u8 *)(mpsc_base + MPSC_CHR_10 + 2));
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out_8((u8 *)(mpsc_base + MPSC_CHR_10 + 2), c);
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out_le32((u32 *)(mpscintr_base + MPSC_INTR_CAUSE),
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cause & ~MPSC_INTR_CAUSE_RCC);
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return c;
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}
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static u8 mpsc_tstc(void)
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{
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return (u8)((in_le32((u32 *)(mpscintr_base + MPSC_INTR_CAUSE))
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& MPSC_INTR_CAUSE_RCC) != 0);
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}
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static void mpsc_stop_dma(volatile char *sdma_base)
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{
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out_le32((u32 *)(mpsc_base + MPSC_CHR_2),MPSC_CHR_2_TA | MPSC_CHR_2_RA);
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out_le32((u32 *)(sdma_base + SDMA_SDCM), SDMA_SDCM_AR | SDMA_SDCM_AT);
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while ((in_le32((u32 *)(sdma_base + SDMA_SDCM))
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& (SDMA_SDCM_AR | SDMA_SDCM_AT)) != 0)
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udelay(100);
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}
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static volatile char *mpsc_get_virtreg_of_phandle(void *devp, char *prop)
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{
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void *v;
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int n;
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n = getprop(devp, prop, &v, sizeof(v));
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if (n != sizeof(v))
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goto err_out;
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devp = find_node_by_linuxphandle((u32)v);
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if (devp == NULL)
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goto err_out;
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n = getprop(devp, "virtual-reg", &v, sizeof(v));
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if (n == sizeof(v))
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return v;
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err_out:
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return NULL;
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}
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int mpsc_console_init(void *devp, struct serial_console_data *scdp)
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{
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void *v;
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int n, reg_set;
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volatile char *sdma_base;
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n = getprop(devp, "virtual-reg", &v, sizeof(v));
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if (n != sizeof(v))
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goto err_out;
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mpsc_base = v;
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sdma_base = mpsc_get_virtreg_of_phandle(devp, "sdma");
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if (sdma_base == NULL)
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goto err_out;
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mpscintr_base = mpsc_get_virtreg_of_phandle(devp, "mpscintr");
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if (mpscintr_base == NULL)
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goto err_out;
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n = getprop(devp, "cell-index", &v, sizeof(v));
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if (n != sizeof(v))
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goto err_out;
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reg_set = (int)v;
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mpscintr_base += (reg_set == 0) ? 0x4 : 0xc;
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/* Make sure the mpsc ctlrs are shutdown */
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out_le32((u32 *)(mpscintr_base + MPSC_INTR_CAUSE), 0);
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out_le32((u32 *)(mpscintr_base + MPSC_INTR_CAUSE), 0);
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out_le32((u32 *)(mpscintr_base + MPSC_INTR_MASK), 0);
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out_le32((u32 *)(mpscintr_base + MPSC_INTR_MASK), 0);
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mpsc_stop_dma(sdma_base);
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scdp->open = mpsc_open;
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scdp->putc = mpsc_putc;
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scdp->getc = mpsc_getc;
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scdp->tstc = mpsc_tstc;
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scdp->close = NULL;
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return 0;
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err_out:
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return -1;
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}
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