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39071cf828
- Fix a bug uncovered by a recent patch on Spansion SPI-NOR flashes. -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEE9HuaYnbmDhq/XIDIJWrqGEe9VoQFAl0Pwk0ACgkQJWrqGEe9 VoS8nwf7B76jN39/g32Hfp4JT/B7cntrHzTGxfUT9NAhKa4MaI7FOU2eeTryaVdO 32OJlttV+r0Fu6p+In1VXCk4j1YlkcOaxqB1VXsMEaQ+Vt8ONVTbJX/cqyGC/ogq MZlO8Rys4MGmq7vRiZ+1SD8lOV4qXgmX3D38NjUQ1oCAMCCgJgkWYFV2tv9Eie09 2CCT3IBFj+D34qaBiM+qocGtnzWfB9477A6ZeI4BwjUe1ZtoEYeIOrCXWiywabjM msHRN1tNt5kfINnx0TkQFcnpbdDo5tMyTHCkEQt5Ewdae4vyCv7xTHTCZEttC7Ic Rx2yONzrZGQVP4c27y22K954C1jGcg== =ZiPm -----END PGP SIGNATURE----- Merge tag 'mtd/fixes-for-5.2-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux Pull mtd fixes from Miquel Raynal: - Set the raw NAND number of targets to the right value - Fix a bug uncovered by a recent patch on Spansion SPI-NOR flashes * tag 'mtd/fixes-for-5.2-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: mtd: spi-nor: use 16-bit WRR command when QE is set on spansion flashes mtd: rawnand: initialize ntargets with maxchips |
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.. | ||
bbm.h | ||
blktrans.h | ||
cfi_endian.h | ||
cfi.h | ||
concat.h | ||
doc2000.h | ||
flashchip.h | ||
ftl.h | ||
gen_probe.h | ||
inftl.h | ||
jedec.h | ||
latch-addr-flash.h | ||
lpc32xx_mlc.h | ||
lpc32xx_slc.h | ||
map.h | ||
mtd.h | ||
mtdram.h | ||
nand_bch.h | ||
nand_ecc.h | ||
nand-gpio.h | ||
nand.h | ||
ndfc.h | ||
nftl.h | ||
onenand_regs.h | ||
onenand.h | ||
onfi.h | ||
partitions.h | ||
pfow.h | ||
physmap.h | ||
pismo.h | ||
plat-ram.h | ||
platnand.h | ||
qinfo.h | ||
rawnand.h | ||
sh_flctl.h | ||
sharpsl.h | ||
spear_smi.h | ||
spi-nor.h | ||
spinand.h | ||
super.h | ||
ubi.h | ||
xip.h |