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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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4814ced511
Only OMAP2+ platforms have the System Control Module (SCM) IP block. In the past, we've kept the SCM header file in plat-omap. This has led to abuse - device drivers including it; includes being added that create implicit dependencies on OMAP2+ builds; etc. In response, move the SCM headers into mach-omap2/. As part of this, remove the direct SCM access from the OMAP UDC driver. It was clearly broken. The UDC code needs an indepth review for use on OMAP2+ chips. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Cory Maccarrone <darkstar6262@gmail.com> Cc: Kyungmin Park <kyungmin.park@samsung.com>
755 lines
16 KiB
C
755 lines
16 KiB
C
/*
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* linux/arch/arm/mach-omap2/mux.c
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*
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* OMAP2 and OMAP3 pin multiplexing configurations
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*
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* Copyright (C) 2004 - 2008 Texas Instruments Inc.
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* Copyright (C) 2003 - 2008 Nokia Corporation
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*
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* Written by Tony Lindgren
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/list.h>
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#include <linux/slab.h>
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#include <linux/ctype.h>
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#include <linux/debugfs.h>
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#include <linux/seq_file.h>
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#include <linux/uaccess.h>
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#include <asm/system.h>
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#include "control.h"
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#include "mux.h"
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#define OMAP_MUX_BASE_OFFSET 0x30 /* Offset from CTRL_BASE */
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#define OMAP_MUX_BASE_SZ 0x5ca
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#define MUXABLE_GPIO_MODE3 BIT(0)
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struct omap_mux_entry {
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struct omap_mux mux;
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struct list_head node;
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};
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static unsigned long mux_phys;
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static void __iomem *mux_base;
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static u8 omap_mux_flags;
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u16 omap_mux_read(u16 reg)
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{
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if (cpu_is_omap24xx())
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return __raw_readb(mux_base + reg);
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else
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return __raw_readw(mux_base + reg);
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}
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void omap_mux_write(u16 val, u16 reg)
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{
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if (cpu_is_omap24xx())
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__raw_writeb(val, mux_base + reg);
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else
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__raw_writew(val, mux_base + reg);
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}
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void omap_mux_write_array(struct omap_board_mux *board_mux)
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{
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while (board_mux->reg_offset != OMAP_MUX_TERMINATOR) {
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omap_mux_write(board_mux->value, board_mux->reg_offset);
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board_mux++;
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}
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}
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static LIST_HEAD(muxmodes);
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static DEFINE_MUTEX(muxmode_mutex);
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#ifdef CONFIG_OMAP_MUX
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static char *omap_mux_options;
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int __init omap_mux_init_gpio(int gpio, int val)
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{
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struct omap_mux_entry *e;
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struct omap_mux *gpio_mux = NULL;
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u16 old_mode;
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u16 mux_mode;
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int found = 0;
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if (!gpio)
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return -EINVAL;
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list_for_each_entry(e, &muxmodes, node) {
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struct omap_mux *m = &e->mux;
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if (gpio == m->gpio) {
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gpio_mux = m;
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found++;
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}
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}
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if (found == 0) {
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printk(KERN_ERR "mux: Could not set gpio%i\n", gpio);
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return -ENODEV;
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}
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if (found > 1) {
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printk(KERN_INFO "mux: Multiple gpio paths (%d) for gpio%i\n",
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found, gpio);
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return -EINVAL;
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}
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old_mode = omap_mux_read(gpio_mux->reg_offset);
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mux_mode = val & ~(OMAP_MUX_NR_MODES - 1);
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if (omap_mux_flags & MUXABLE_GPIO_MODE3)
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mux_mode |= OMAP_MUX_MODE3;
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else
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mux_mode |= OMAP_MUX_MODE4;
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printk(KERN_DEBUG "mux: Setting signal %s.gpio%i 0x%04x -> 0x%04x\n",
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gpio_mux->muxnames[0], gpio, old_mode, mux_mode);
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omap_mux_write(mux_mode, gpio_mux->reg_offset);
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return 0;
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}
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int __init omap_mux_init_signal(const char *muxname, int val)
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{
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struct omap_mux_entry *e;
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const char *mode_name;
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int found = 0, mode0_len = 0;
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mode_name = strchr(muxname, '.');
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if (mode_name) {
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mode0_len = strlen(muxname) - strlen(mode_name);
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mode_name++;
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} else {
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mode_name = muxname;
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}
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list_for_each_entry(e, &muxmodes, node) {
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struct omap_mux *m = &e->mux;
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char *m0_entry = m->muxnames[0];
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int i;
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/* First check for full name in mode0.muxmode format */
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if (mode0_len && strncmp(muxname, m0_entry, mode0_len))
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continue;
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/* Then check for muxmode only */
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for (i = 0; i < OMAP_MUX_NR_MODES; i++) {
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char *mode_cur = m->muxnames[i];
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if (!mode_cur)
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continue;
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if (!strcmp(mode_name, mode_cur)) {
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u16 old_mode;
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u16 mux_mode;
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old_mode = omap_mux_read(m->reg_offset);
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mux_mode = val | i;
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printk(KERN_DEBUG "mux: Setting signal "
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"%s.%s 0x%04x -> 0x%04x\n",
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m0_entry, muxname, old_mode, mux_mode);
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omap_mux_write(mux_mode, m->reg_offset);
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found++;
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}
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}
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}
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if (found == 1)
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return 0;
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if (found > 1) {
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printk(KERN_ERR "mux: Multiple signal paths (%i) for %s\n",
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found, muxname);
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return -EINVAL;
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}
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printk(KERN_ERR "mux: Could not set signal %s\n", muxname);
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return -ENODEV;
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}
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#ifdef CONFIG_DEBUG_FS
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#define OMAP_MUX_MAX_NR_FLAGS 10
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#define OMAP_MUX_TEST_FLAG(val, mask) \
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if (((val) & (mask)) == (mask)) { \
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i++; \
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flags[i] = #mask; \
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}
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/* REVISIT: Add checking for non-optimal mux settings */
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static inline void omap_mux_decode(struct seq_file *s, u16 val)
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{
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char *flags[OMAP_MUX_MAX_NR_FLAGS];
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char mode[sizeof("OMAP_MUX_MODE") + 1];
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int i = -1;
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sprintf(mode, "OMAP_MUX_MODE%d", val & 0x7);
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i++;
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flags[i] = mode;
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OMAP_MUX_TEST_FLAG(val, OMAP_PIN_OFF_WAKEUPENABLE);
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if (val & OMAP_OFF_EN) {
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if (!(val & OMAP_OFFOUT_EN)) {
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if (!(val & OMAP_OFF_PULL_UP)) {
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OMAP_MUX_TEST_FLAG(val,
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OMAP_PIN_OFF_INPUT_PULLDOWN);
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} else {
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OMAP_MUX_TEST_FLAG(val,
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OMAP_PIN_OFF_INPUT_PULLUP);
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}
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} else {
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if (!(val & OMAP_OFFOUT_VAL)) {
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OMAP_MUX_TEST_FLAG(val,
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OMAP_PIN_OFF_OUTPUT_LOW);
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} else {
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OMAP_MUX_TEST_FLAG(val,
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OMAP_PIN_OFF_OUTPUT_HIGH);
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}
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}
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}
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if (val & OMAP_INPUT_EN) {
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if (val & OMAP_PULL_ENA) {
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if (!(val & OMAP_PULL_UP)) {
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OMAP_MUX_TEST_FLAG(val,
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OMAP_PIN_INPUT_PULLDOWN);
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} else {
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OMAP_MUX_TEST_FLAG(val, OMAP_PIN_INPUT_PULLUP);
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}
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} else {
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OMAP_MUX_TEST_FLAG(val, OMAP_PIN_INPUT);
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}
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} else {
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i++;
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flags[i] = "OMAP_PIN_OUTPUT";
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}
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do {
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seq_printf(s, "%s", flags[i]);
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if (i > 0)
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seq_printf(s, " | ");
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} while (i-- > 0);
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}
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#define OMAP_MUX_DEFNAME_LEN 16
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static int omap_mux_dbg_board_show(struct seq_file *s, void *unused)
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{
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struct omap_mux_entry *e;
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list_for_each_entry(e, &muxmodes, node) {
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struct omap_mux *m = &e->mux;
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char m0_def[OMAP_MUX_DEFNAME_LEN];
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char *m0_name = m->muxnames[0];
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u16 val;
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int i, mode;
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if (!m0_name)
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continue;
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/* REVISIT: Needs to be updated if mode0 names get longer */
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for (i = 0; i < OMAP_MUX_DEFNAME_LEN; i++) {
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if (m0_name[i] == '\0') {
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m0_def[i] = m0_name[i];
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break;
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}
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m0_def[i] = toupper(m0_name[i]);
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}
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val = omap_mux_read(m->reg_offset);
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mode = val & OMAP_MUX_MODE7;
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seq_printf(s, "OMAP%i_MUX(%s, ",
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cpu_is_omap34xx() ? 3 : 0, m0_def);
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omap_mux_decode(s, val);
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seq_printf(s, "),\n");
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}
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return 0;
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}
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static int omap_mux_dbg_board_open(struct inode *inode, struct file *file)
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{
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return single_open(file, omap_mux_dbg_board_show, &inode->i_private);
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}
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static const struct file_operations omap_mux_dbg_board_fops = {
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.open = omap_mux_dbg_board_open,
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.read = seq_read,
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.llseek = seq_lseek,
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.release = single_release,
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};
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static int omap_mux_dbg_signal_show(struct seq_file *s, void *unused)
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{
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struct omap_mux *m = s->private;
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const char *none = "NA";
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u16 val;
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int mode;
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val = omap_mux_read(m->reg_offset);
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mode = val & OMAP_MUX_MODE7;
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seq_printf(s, "name: %s.%s (0x%08lx/0x%03x = 0x%04x), b %s, t %s\n",
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m->muxnames[0], m->muxnames[mode],
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mux_phys + m->reg_offset, m->reg_offset, val,
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m->balls[0] ? m->balls[0] : none,
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m->balls[1] ? m->balls[1] : none);
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seq_printf(s, "mode: ");
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omap_mux_decode(s, val);
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seq_printf(s, "\n");
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seq_printf(s, "signals: %s | %s | %s | %s | %s | %s | %s | %s\n",
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m->muxnames[0] ? m->muxnames[0] : none,
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m->muxnames[1] ? m->muxnames[1] : none,
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m->muxnames[2] ? m->muxnames[2] : none,
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m->muxnames[3] ? m->muxnames[3] : none,
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m->muxnames[4] ? m->muxnames[4] : none,
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m->muxnames[5] ? m->muxnames[5] : none,
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m->muxnames[6] ? m->muxnames[6] : none,
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m->muxnames[7] ? m->muxnames[7] : none);
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return 0;
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}
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#define OMAP_MUX_MAX_ARG_CHAR 7
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static ssize_t omap_mux_dbg_signal_write(struct file *file,
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const char __user *user_buf,
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size_t count, loff_t *ppos)
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{
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char buf[OMAP_MUX_MAX_ARG_CHAR];
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struct seq_file *seqf;
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struct omap_mux *m;
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unsigned long val;
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int buf_size, ret;
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if (count > OMAP_MUX_MAX_ARG_CHAR)
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return -EINVAL;
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memset(buf, 0, sizeof(buf));
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buf_size = min(count, sizeof(buf) - 1);
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if (copy_from_user(buf, user_buf, buf_size))
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return -EFAULT;
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ret = strict_strtoul(buf, 0x10, &val);
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if (ret < 0)
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return ret;
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if (val > 0xffff)
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return -EINVAL;
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seqf = file->private_data;
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m = seqf->private;
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omap_mux_write((u16)val, m->reg_offset);
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*ppos += count;
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return count;
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}
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static int omap_mux_dbg_signal_open(struct inode *inode, struct file *file)
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{
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return single_open(file, omap_mux_dbg_signal_show, inode->i_private);
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}
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static const struct file_operations omap_mux_dbg_signal_fops = {
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.open = omap_mux_dbg_signal_open,
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.read = seq_read,
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.write = omap_mux_dbg_signal_write,
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.llseek = seq_lseek,
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.release = single_release,
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};
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static struct dentry *mux_dbg_dir;
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static void __init omap_mux_dbg_init(void)
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{
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struct omap_mux_entry *e;
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mux_dbg_dir = debugfs_create_dir("omap_mux", NULL);
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if (!mux_dbg_dir)
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return;
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(void)debugfs_create_file("board", S_IRUGO, mux_dbg_dir,
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NULL, &omap_mux_dbg_board_fops);
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list_for_each_entry(e, &muxmodes, node) {
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struct omap_mux *m = &e->mux;
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(void)debugfs_create_file(m->muxnames[0], S_IWUGO, mux_dbg_dir,
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m, &omap_mux_dbg_signal_fops);
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}
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}
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#else
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static inline void omap_mux_dbg_init(void)
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{
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}
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#endif /* CONFIG_DEBUG_FS */
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static void __init omap_mux_free_names(struct omap_mux *m)
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{
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int i;
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for (i = 0; i < OMAP_MUX_NR_MODES; i++)
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kfree(m->muxnames[i]);
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#ifdef CONFIG_DEBUG_FS
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for (i = 0; i < OMAP_MUX_NR_SIDES; i++)
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kfree(m->balls[i]);
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#endif
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}
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/* Free all data except for GPIO pins unless CONFIG_DEBUG_FS is set */
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static int __init omap_mux_late_init(void)
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{
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struct omap_mux_entry *e, *tmp;
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list_for_each_entry_safe(e, tmp, &muxmodes, node) {
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struct omap_mux *m = &e->mux;
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u16 mode = omap_mux_read(m->reg_offset);
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if (OMAP_MODE_GPIO(mode))
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continue;
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#ifndef CONFIG_DEBUG_FS
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mutex_lock(&muxmode_mutex);
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list_del(&e->node);
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mutex_unlock(&muxmode_mutex);
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omap_mux_free_names(m);
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kfree(m);
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#endif
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}
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omap_mux_dbg_init();
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return 0;
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}
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late_initcall(omap_mux_late_init);
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static void __init omap_mux_package_fixup(struct omap_mux *p,
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struct omap_mux *superset)
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{
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while (p->reg_offset != OMAP_MUX_TERMINATOR) {
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struct omap_mux *s = superset;
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int found = 0;
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while (s->reg_offset != OMAP_MUX_TERMINATOR) {
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if (s->reg_offset == p->reg_offset) {
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*s = *p;
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found++;
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break;
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}
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s++;
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}
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if (!found)
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printk(KERN_ERR "mux: Unknown entry offset 0x%x\n",
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p->reg_offset);
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p++;
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}
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}
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#ifdef CONFIG_DEBUG_FS
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static void __init omap_mux_package_init_balls(struct omap_ball *b,
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struct omap_mux *superset)
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{
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while (b->reg_offset != OMAP_MUX_TERMINATOR) {
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struct omap_mux *s = superset;
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int found = 0;
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while (s->reg_offset != OMAP_MUX_TERMINATOR) {
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if (s->reg_offset == b->reg_offset) {
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s->balls[0] = b->balls[0];
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s->balls[1] = b->balls[1];
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found++;
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break;
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}
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s++;
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}
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if (!found)
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printk(KERN_ERR "mux: Unknown ball offset 0x%x\n",
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b->reg_offset);
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b++;
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}
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}
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#else /* CONFIG_DEBUG_FS */
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static inline void omap_mux_package_init_balls(struct omap_ball *b,
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struct omap_mux *superset)
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{
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}
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#endif /* CONFIG_DEBUG_FS */
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static int __init omap_mux_setup(char *options)
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{
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if (!options)
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return 0;
|
|
|
|
omap_mux_options = options;
|
|
|
|
return 1;
|
|
}
|
|
__setup("omap_mux=", omap_mux_setup);
|
|
|
|
/*
|
|
* Note that the omap_mux=some.signal1=0x1234,some.signal2=0x1234
|
|
* cmdline options only override the bootloader values.
|
|
* During development, please enable CONFIG_DEBUG_FS, and use the
|
|
* signal specific entries under debugfs.
|
|
*/
|
|
static void __init omap_mux_set_cmdline_signals(void)
|
|
{
|
|
char *options, *next_opt, *token;
|
|
|
|
if (!omap_mux_options)
|
|
return;
|
|
|
|
options = kmalloc(strlen(omap_mux_options) + 1, GFP_KERNEL);
|
|
if (!options)
|
|
return;
|
|
|
|
strcpy(options, omap_mux_options);
|
|
next_opt = options;
|
|
|
|
while ((token = strsep(&next_opt, ",")) != NULL) {
|
|
char *keyval, *name;
|
|
unsigned long val;
|
|
|
|
keyval = token;
|
|
name = strsep(&keyval, "=");
|
|
if (name) {
|
|
int res;
|
|
|
|
res = strict_strtoul(keyval, 0x10, &val);
|
|
if (res < 0)
|
|
continue;
|
|
|
|
omap_mux_init_signal(name, (u16)val);
|
|
}
|
|
}
|
|
|
|
kfree(options);
|
|
}
|
|
|
|
static int __init omap_mux_copy_names(struct omap_mux *src,
|
|
struct omap_mux *dst)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < OMAP_MUX_NR_MODES; i++) {
|
|
if (src->muxnames[i]) {
|
|
dst->muxnames[i] =
|
|
kmalloc(strlen(src->muxnames[i]) + 1,
|
|
GFP_KERNEL);
|
|
if (!dst->muxnames[i])
|
|
goto free;
|
|
strcpy(dst->muxnames[i], src->muxnames[i]);
|
|
}
|
|
}
|
|
|
|
#ifdef CONFIG_DEBUG_FS
|
|
for (i = 0; i < OMAP_MUX_NR_SIDES; i++) {
|
|
if (src->balls[i]) {
|
|
dst->balls[i] =
|
|
kmalloc(strlen(src->balls[i]) + 1,
|
|
GFP_KERNEL);
|
|
if (!dst->balls[i])
|
|
goto free;
|
|
strcpy(dst->balls[i], src->balls[i]);
|
|
}
|
|
}
|
|
#endif
|
|
|
|
return 0;
|
|
|
|
free:
|
|
omap_mux_free_names(dst);
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
#endif /* CONFIG_OMAP_MUX */
|
|
|
|
static u16 omap_mux_get_by_gpio(int gpio)
|
|
{
|
|
struct omap_mux_entry *e;
|
|
u16 offset = OMAP_MUX_TERMINATOR;
|
|
|
|
list_for_each_entry(e, &muxmodes, node) {
|
|
struct omap_mux *m = &e->mux;
|
|
if (m->gpio == gpio) {
|
|
offset = m->reg_offset;
|
|
break;
|
|
}
|
|
}
|
|
|
|
return offset;
|
|
}
|
|
|
|
/* Needed for dynamic muxing of GPIO pins for off-idle */
|
|
u16 omap_mux_get_gpio(int gpio)
|
|
{
|
|
u16 offset;
|
|
|
|
offset = omap_mux_get_by_gpio(gpio);
|
|
if (offset == OMAP_MUX_TERMINATOR) {
|
|
printk(KERN_ERR "mux: Could not get gpio%i\n", gpio);
|
|
return offset;
|
|
}
|
|
|
|
return omap_mux_read(offset);
|
|
}
|
|
|
|
/* Needed for dynamic muxing of GPIO pins for off-idle */
|
|
void omap_mux_set_gpio(u16 val, int gpio)
|
|
{
|
|
u16 offset;
|
|
|
|
offset = omap_mux_get_by_gpio(gpio);
|
|
if (offset == OMAP_MUX_TERMINATOR) {
|
|
printk(KERN_ERR "mux: Could not set gpio%i\n", gpio);
|
|
return;
|
|
}
|
|
|
|
omap_mux_write(val, offset);
|
|
}
|
|
|
|
static struct omap_mux * __init omap_mux_list_add(struct omap_mux *src)
|
|
{
|
|
struct omap_mux_entry *entry;
|
|
struct omap_mux *m;
|
|
|
|
entry = kzalloc(sizeof(struct omap_mux_entry), GFP_KERNEL);
|
|
if (!entry)
|
|
return NULL;
|
|
|
|
m = &entry->mux;
|
|
memcpy(m, src, sizeof(struct omap_mux_entry));
|
|
|
|
#ifdef CONFIG_OMAP_MUX
|
|
if (omap_mux_copy_names(src, m)) {
|
|
kfree(entry);
|
|
return NULL;
|
|
}
|
|
#endif
|
|
|
|
mutex_lock(&muxmode_mutex);
|
|
list_add_tail(&entry->node, &muxmodes);
|
|
mutex_unlock(&muxmode_mutex);
|
|
|
|
return m;
|
|
}
|
|
|
|
/*
|
|
* Note if CONFIG_OMAP_MUX is not selected, we will only initialize
|
|
* the GPIO to mux offset mapping that is needed for dynamic muxing
|
|
* of GPIO pins for off-idle.
|
|
*/
|
|
static void __init omap_mux_init_list(struct omap_mux *superset)
|
|
{
|
|
while (superset->reg_offset != OMAP_MUX_TERMINATOR) {
|
|
struct omap_mux *entry;
|
|
|
|
#ifdef CONFIG_OMAP_MUX
|
|
if (!superset->muxnames || !superset->muxnames[0]) {
|
|
superset++;
|
|
continue;
|
|
}
|
|
#else
|
|
/* Skip pins that are not muxed as GPIO by bootloader */
|
|
if (!OMAP_MODE_GPIO(omap_mux_read(superset->reg_offset))) {
|
|
superset++;
|
|
continue;
|
|
}
|
|
#endif
|
|
|
|
entry = omap_mux_list_add(superset);
|
|
if (!entry) {
|
|
printk(KERN_ERR "mux: Could not add entry\n");
|
|
return;
|
|
}
|
|
superset++;
|
|
}
|
|
}
|
|
|
|
#ifdef CONFIG_OMAP_MUX
|
|
|
|
static void omap_mux_init_package(struct omap_mux *superset,
|
|
struct omap_mux *package_subset,
|
|
struct omap_ball *package_balls)
|
|
{
|
|
if (package_subset)
|
|
omap_mux_package_fixup(package_subset, superset);
|
|
if (package_balls)
|
|
omap_mux_package_init_balls(package_balls, superset);
|
|
}
|
|
|
|
static void omap_mux_init_signals(struct omap_board_mux *board_mux)
|
|
{
|
|
omap_mux_set_cmdline_signals();
|
|
omap_mux_write_array(board_mux);
|
|
}
|
|
|
|
#else
|
|
|
|
static void omap_mux_init_package(struct omap_mux *superset,
|
|
struct omap_mux *package_subset,
|
|
struct omap_ball *package_balls)
|
|
{
|
|
}
|
|
|
|
static void omap_mux_init_signals(struct omap_board_mux *board_mux)
|
|
{
|
|
}
|
|
|
|
#endif
|
|
|
|
int __init omap_mux_init(u32 mux_pbase, u32 mux_size,
|
|
struct omap_mux *superset,
|
|
struct omap_mux *package_subset,
|
|
struct omap_board_mux *board_mux,
|
|
struct omap_ball *package_balls)
|
|
{
|
|
if (mux_base)
|
|
return -EBUSY;
|
|
|
|
mux_phys = mux_pbase;
|
|
mux_base = ioremap(mux_pbase, mux_size);
|
|
if (!mux_base) {
|
|
printk(KERN_ERR "mux: Could not ioremap\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
if (cpu_is_omap24xx())
|
|
omap_mux_flags = MUXABLE_GPIO_MODE3;
|
|
|
|
omap_mux_init_package(superset, package_subset, package_balls);
|
|
omap_mux_init_list(superset);
|
|
omap_mux_init_signals(board_mux);
|
|
|
|
return 0;
|
|
}
|
|
|