mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-20 02:07:40 +07:00
b5a53b61a2
to me not catching up as quickly on patch review than anything else.
Overall it seems normal though, a few small changes to the core, mostly
small non-critical fixes here and there as well as driver updates for new
and existing hardware support. The biggest things are the TI clk driver
rework to lay the groundwork for clkctrl support in the next merge window
and the AmLogic audio/graphics clk support.
Core:
* clk_possible_parents debugfs file so we know which parents a clk
could possibly have
* Fix to make clk rate change notifiers stop on the first failure instead
of continuing
New Drivers:
* Mediatek MT6797 SoCs
* hi655x PMIC clks
* AmLogic Meson SoC i2s and spdif audio clks and Mali graphics clks
* Allwinner H5 SoCs and PRCM hardware
Updates:
* Nvidia Tegra T210 cleanups and non-critical fixes
* TI OMAP cleanups in preparation for clkctrl support
* Trivial fixes like kcalloc(), devm_* conversions, and seq_puts()
* ZTE zx296718 SoC VGA clks
* Rockchip clk-ids, fixups, and rename of rk1108 to rv1108
* Support for IDT VersaClock 5P49V5935
* Renesas R-Car H3 and M3-W IMR clks and ES2.0 rev of R-Car H3 support
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"Sort of on the quieter side this time, which is probably due more to
me not catching up as quickly on patch review than anything else.
Overall it seems normal though, a few small changes to the core,
mostly small non-critical fixes here and there as well as driver
updates for new and existing hardware support.
The biggest things are the TI clk driver rework to lay the groundwork
for clkctrl support in the next merge window and the AmLogic
audio/graphics clk support.
Core:
- clk_possible_parents debugfs file so we know which parents a clk
could possibly have
- Fix to make clk rate change notifiers stop on the first failure
instead of continuing
New Drivers:
- Mediatek MT6797 SoCs
- hi655x PMIC clks
- AmLogic Meson SoC i2s and spdif audio clks and Mali graphics clks
- Allwinner H5 SoCs and PRCM hardware
Updates:
- Nvidia Tegra T210 cleanups and non-critical fixes
- TI OMAP cleanups in preparation for clkctrl support
- trivial fixes like kcalloc(), devm_* conversions, and seq_puts()
- ZTE zx296718 SoC VGA clks
- Rockchip clk-ids, fixups, and rename of rk1108 to rv1108
- IDT VersaClock 5P49V5935 support
- Renesas R-Car H3 and M3-W IMR clks and ES2.0 rev of R-Car H3
support"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (151 commits)
clk: x86: pmc-atom: Checking for IS_ERR() instead of NULL
clk: ti: divider: try to fix ti_clk_register_divider
clk: mvebu: Use kcalloc() in two functions
clk: mvebu: Use kcalloc() in of_cpu_clk_setup()
clk: nomadik: Delete error messages for a failed memory allocation in two functions
clk: nomadik: Use seq_puts() in nomadik_src_clk_show()
clk: Improve a size determination in two functions
clk: Replace four seq_printf() calls by seq_putc()
clk: si5351: Delete an error message for a failed memory allocation in si5351_i2c_probe()
clk: si5351: Use devm_kcalloc() in si5351_i2c_probe()
clk: at91: Use kcalloc() in of_at91_clk_pll_get_characteristics()
reset: mediatek: Add MT2701 ethsys reset controller include file
clk: mediatek: add mt2701 ethernet reset
clk: hi6220: Add the hi655x's pmic clock
clk: ti: fix building without legacy omap3
clk: ti: fix linker error with !SOC_OMAP4
clk: hi3620: Fix a typo in one variable name
clk: hi3620: Delete error messages for a failed memory allocation in two functions
clk: hi3620: Use kcalloc() in hi3620_mmc_clk_init()
clk: hisilicon: Delete error messages for failed memory allocations in hisi_clk_init()
...
162 lines
3.2 KiB
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162 lines
3.2 KiB
Plaintext
config SUNXI_CCU
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bool "Clock support for Allwinner SoCs"
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depends on ARCH_SUNXI || COMPILE_TEST
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select RESET_CONTROLLER
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default ARCH_SUNXI
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if SUNXI_CCU
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# Base clock types
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config SUNXI_CCU_DIV
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bool
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select SUNXI_CCU_MUX
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config SUNXI_CCU_FRAC
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bool
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config SUNXI_CCU_GATE
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def_bool y
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config SUNXI_CCU_MUX
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bool
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config SUNXI_CCU_MULT
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bool
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select SUNXI_CCU_MUX
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config SUNXI_CCU_PHASE
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bool
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# Multi-factor clocks
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config SUNXI_CCU_NK
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bool
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select SUNXI_CCU_GATE
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config SUNXI_CCU_NKM
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bool
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select SUNXI_CCU_GATE
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config SUNXI_CCU_NKMP
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bool
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select SUNXI_CCU_GATE
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config SUNXI_CCU_NM
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bool
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select SUNXI_CCU_FRAC
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select SUNXI_CCU_GATE
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config SUNXI_CCU_MP
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bool
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select SUNXI_CCU_GATE
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select SUNXI_CCU_MUX
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# SoC Drivers
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config SUN50I_A64_CCU
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bool "Support for the Allwinner A64 CCU"
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select SUNXI_CCU_DIV
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select SUNXI_CCU_NK
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select SUNXI_CCU_NKM
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select SUNXI_CCU_NKMP
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select SUNXI_CCU_NM
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select SUNXI_CCU_MP
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select SUNXI_CCU_PHASE
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default ARM64 && ARCH_SUNXI
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depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST
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config SUN5I_CCU
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bool "Support for the Allwinner sun5i family CCM"
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select SUNXI_CCU_DIV
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select SUNXI_CCU_MULT
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select SUNXI_CCU_NK
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select SUNXI_CCU_NKM
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select SUNXI_CCU_NM
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select SUNXI_CCU_MP
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select SUNXI_CCU_PHASE
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default MACH_SUN5I
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depends on MACH_SUN5I || COMPILE_TEST
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config SUN6I_A31_CCU
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bool "Support for the Allwinner A31/A31s CCU"
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select SUNXI_CCU_DIV
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select SUNXI_CCU_NK
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select SUNXI_CCU_NKM
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select SUNXI_CCU_NKMP
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select SUNXI_CCU_NM
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select SUNXI_CCU_MP
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select SUNXI_CCU_PHASE
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default MACH_SUN6I
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depends on MACH_SUN6I || COMPILE_TEST
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config SUN8I_A23_CCU
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bool "Support for the Allwinner A23 CCU"
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select SUNXI_CCU_DIV
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select SUNXI_CCU_MULT
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select SUNXI_CCU_NK
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select SUNXI_CCU_NKM
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select SUNXI_CCU_NKMP
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select SUNXI_CCU_NM
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select SUNXI_CCU_MP
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select SUNXI_CCU_PHASE
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default MACH_SUN8I
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depends on MACH_SUN8I || COMPILE_TEST
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config SUN8I_A33_CCU
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bool "Support for the Allwinner A33 CCU"
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select SUNXI_CCU_DIV
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select SUNXI_CCU_MULT
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select SUNXI_CCU_NK
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select SUNXI_CCU_NKM
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select SUNXI_CCU_NKMP
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select SUNXI_CCU_NM
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select SUNXI_CCU_MP
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select SUNXI_CCU_PHASE
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default MACH_SUN8I
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depends on MACH_SUN8I || COMPILE_TEST
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config SUN8I_H3_CCU
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bool "Support for the Allwinner H3 CCU"
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select SUNXI_CCU_DIV
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select SUNXI_CCU_NK
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select SUNXI_CCU_NKM
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select SUNXI_CCU_NKMP
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select SUNXI_CCU_NM
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select SUNXI_CCU_MP
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select SUNXI_CCU_PHASE
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default MACH_SUN8I || (ARM64 && ARCH_SUNXI)
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depends on MACH_SUN8I || (ARM64 && ARCH_SUNXI) || COMPILE_TEST
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config SUN8I_V3S_CCU
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bool "Support for the Allwinner V3s CCU"
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select SUNXI_CCU_DIV
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select SUNXI_CCU_NK
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select SUNXI_CCU_NKM
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select SUNXI_CCU_NKMP
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select SUNXI_CCU_NM
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select SUNXI_CCU_MP
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select SUNXI_CCU_PHASE
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default MACH_SUN8I
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depends on MACH_SUN8I || COMPILE_TEST
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config SUN9I_A80_CCU
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bool "Support for the Allwinner A80 CCU"
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select SUNXI_CCU_DIV
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select SUNXI_CCU_MULT
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select SUNXI_CCU_GATE
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select SUNXI_CCU_NKMP
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select SUNXI_CCU_NM
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select SUNXI_CCU_MP
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select SUNXI_CCU_PHASE
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default MACH_SUN9I
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depends on MACH_SUN9I || COMPILE_TEST
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config SUN8I_R_CCU
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bool "Support for Allwinner SoCs' PRCM CCUs"
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select SUNXI_CCU_DIV
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select SUNXI_CCU_GATE
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default MACH_SUN8I || (ARCH_SUNXI && ARM64)
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endif
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