mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-19 10:06:45 +07:00
7f08e6aabd
Remove the empty reg property from the SoC dtsi files in order to avoid duplicate memory nodes when the correct size is passed in board dts files. Signed-off-by: Marco Franchi <marco.franchi@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
638 lines
15 KiB
Plaintext
638 lines
15 KiB
Plaintext
/*
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* Copyright 2012 Freescale Semiconductor, Inc.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include "imx23-pinfunc.h"
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&icoll>;
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/*
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* The decompressor and also some bootloaders rely on a
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* pre-existing /chosen node to be available to insert the
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* command line and merge other ATAGS info.
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* Also for U-Boot there must be a pre-existing /memory node.
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*/
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chosen {};
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memory { device_type = "memory"; };
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aliases {
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gpio0 = &gpio0;
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gpio1 = &gpio1;
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gpio2 = &gpio2;
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serial0 = &auart0;
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serial1 = &auart1;
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spi0 = &ssp0;
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spi1 = &ssp1;
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usbphy0 = &usbphy0;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "arm,arm926ej-s";
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device_type = "cpu";
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reg = <0>;
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};
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};
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apb@80000000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x80000000 0x80000>;
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ranges;
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apbh@80000000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x80000000 0x40000>;
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ranges;
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icoll: interrupt-controller@80000000 {
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compatible = "fsl,imx23-icoll", "fsl,icoll";
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0x80000000 0x2000>;
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};
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dma_apbh: dma-apbh@80004000 {
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compatible = "fsl,imx23-dma-apbh";
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reg = <0x80004000 0x2000>;
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interrupts = <0 14 20 0
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13 13 13 13>;
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interrupt-names = "empty", "ssp0", "ssp1", "empty",
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"gpmi0", "gpmi1", "gpmi2", "gpmi3";
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#dma-cells = <1>;
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dma-channels = <8>;
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clocks = <&clks 15>;
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};
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ecc@80008000 {
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reg = <0x80008000 0x2000>;
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status = "disabled";
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};
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gpmi-nand@8000c000 {
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compatible = "fsl,imx23-gpmi-nand";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
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reg-names = "gpmi-nand", "bch";
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interrupts = <56>;
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interrupt-names = "bch";
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clocks = <&clks 34>;
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clock-names = "gpmi_io";
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dmas = <&dma_apbh 4>;
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dma-names = "rx-tx";
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status = "disabled";
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};
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ssp0: ssp@80010000 {
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reg = <0x80010000 0x2000>;
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interrupts = <15>;
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clocks = <&clks 33>;
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dmas = <&dma_apbh 1>;
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dma-names = "rx-tx";
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status = "disabled";
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};
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etm@80014000 {
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reg = <0x80014000 0x2000>;
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status = "disabled";
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};
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pinctrl@80018000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx23-pinctrl", "simple-bus";
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reg = <0x80018000 0x2000>;
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gpio0: gpio@0 {
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compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
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reg = <0>;
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interrupts = <16>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio1: gpio@1 {
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compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
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reg = <1>;
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interrupts = <17>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio2: gpio@2 {
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compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
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reg = <2>;
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interrupts = <18>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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duart_pins_a: duart@0 {
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reg = <0>;
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fsl,pinmux-ids = <
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MX23_PAD_PWM0__DUART_RX
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MX23_PAD_PWM1__DUART_TX
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>;
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fsl,drive-strength = <MXS_DRIVE_4mA>;
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fsl,voltage = <MXS_VOLTAGE_HIGH>;
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fsl,pull-up = <MXS_PULL_DISABLE>;
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};
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auart0_pins_a: auart0@0 {
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reg = <0>;
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fsl,pinmux-ids = <
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MX23_PAD_AUART1_RX__AUART1_RX
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MX23_PAD_AUART1_TX__AUART1_TX
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MX23_PAD_AUART1_CTS__AUART1_CTS
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MX23_PAD_AUART1_RTS__AUART1_RTS
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>;
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fsl,drive-strength = <MXS_DRIVE_4mA>;
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fsl,voltage = <MXS_VOLTAGE_HIGH>;
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fsl,pull-up = <MXS_PULL_DISABLE>;
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};
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auart0_2pins_a: auart0-2pins@0 {
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reg = <0>;
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fsl,pinmux-ids = <
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MX23_PAD_I2C_SCL__AUART1_TX
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MX23_PAD_I2C_SDA__AUART1_RX
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>;
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fsl,drive-strength = <MXS_DRIVE_4mA>;
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fsl,voltage = <MXS_VOLTAGE_HIGH>;
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fsl,pull-up = <MXS_PULL_DISABLE>;
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};
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auart1_2pins_a: auart1-2pins@0 {
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reg = <0>;
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fsl,pinmux-ids = <
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MX23_PAD_GPMI_D14__AUART2_RX
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MX23_PAD_GPMI_D15__AUART2_TX
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>;
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fsl,drive-strength = <MXS_DRIVE_4mA>;
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fsl,voltage = <MXS_VOLTAGE_HIGH>;
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fsl,pull-up = <MXS_PULL_DISABLE>;
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};
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gpmi_pins_a: gpmi-nand@0 {
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reg = <0>;
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fsl,pinmux-ids = <
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MX23_PAD_GPMI_D00__GPMI_D00
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MX23_PAD_GPMI_D01__GPMI_D01
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MX23_PAD_GPMI_D02__GPMI_D02
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MX23_PAD_GPMI_D03__GPMI_D03
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MX23_PAD_GPMI_D04__GPMI_D04
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MX23_PAD_GPMI_D05__GPMI_D05
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MX23_PAD_GPMI_D06__GPMI_D06
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MX23_PAD_GPMI_D07__GPMI_D07
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MX23_PAD_GPMI_CLE__GPMI_CLE
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MX23_PAD_GPMI_ALE__GPMI_ALE
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MX23_PAD_GPMI_RDY0__GPMI_RDY0
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MX23_PAD_GPMI_RDY1__GPMI_RDY1
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MX23_PAD_GPMI_WPN__GPMI_WPN
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MX23_PAD_GPMI_WRN__GPMI_WRN
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MX23_PAD_GPMI_RDN__GPMI_RDN
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MX23_PAD_GPMI_CE1N__GPMI_CE1N
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MX23_PAD_GPMI_CE0N__GPMI_CE0N
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>;
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fsl,drive-strength = <MXS_DRIVE_4mA>;
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fsl,voltage = <MXS_VOLTAGE_HIGH>;
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fsl,pull-up = <MXS_PULL_DISABLE>;
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};
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gpmi_pins_fixup: gpmi-pins-fixup@0 {
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reg = <0>;
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fsl,pinmux-ids = <
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MX23_PAD_GPMI_WPN__GPMI_WPN
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MX23_PAD_GPMI_WRN__GPMI_WRN
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MX23_PAD_GPMI_RDN__GPMI_RDN
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>;
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fsl,drive-strength = <MXS_DRIVE_12mA>;
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};
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mmc0_4bit_pins_a: mmc0-4bit@0 {
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reg = <0>;
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fsl,pinmux-ids = <
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MX23_PAD_SSP1_DATA0__SSP1_DATA0
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MX23_PAD_SSP1_DATA1__SSP1_DATA1
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MX23_PAD_SSP1_DATA2__SSP1_DATA2
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MX23_PAD_SSP1_DATA3__SSP1_DATA3
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MX23_PAD_SSP1_CMD__SSP1_CMD
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MX23_PAD_SSP1_SCK__SSP1_SCK
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>;
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fsl,drive-strength = <MXS_DRIVE_8mA>;
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fsl,voltage = <MXS_VOLTAGE_HIGH>;
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fsl,pull-up = <MXS_PULL_ENABLE>;
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};
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mmc0_8bit_pins_a: mmc0-8bit@0 {
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reg = <0>;
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fsl,pinmux-ids = <
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MX23_PAD_SSP1_DATA0__SSP1_DATA0
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MX23_PAD_SSP1_DATA1__SSP1_DATA1
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MX23_PAD_SSP1_DATA2__SSP1_DATA2
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MX23_PAD_SSP1_DATA3__SSP1_DATA3
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MX23_PAD_GPMI_D08__SSP1_DATA4
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MX23_PAD_GPMI_D09__SSP1_DATA5
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MX23_PAD_GPMI_D10__SSP1_DATA6
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MX23_PAD_GPMI_D11__SSP1_DATA7
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MX23_PAD_SSP1_CMD__SSP1_CMD
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MX23_PAD_SSP1_DETECT__SSP1_DETECT
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MX23_PAD_SSP1_SCK__SSP1_SCK
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>;
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fsl,drive-strength = <MXS_DRIVE_8mA>;
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fsl,voltage = <MXS_VOLTAGE_HIGH>;
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fsl,pull-up = <MXS_PULL_ENABLE>;
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};
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mmc0_pins_fixup: mmc0-pins-fixup@0 {
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reg = <0>;
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fsl,pinmux-ids = <
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MX23_PAD_SSP1_DETECT__SSP1_DETECT
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MX23_PAD_SSP1_SCK__SSP1_SCK
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>;
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fsl,pull-up = <MXS_PULL_DISABLE>;
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};
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mmc1_4bit_pins_a: mmc1-4bit@0 {
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reg = <0>;
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fsl,pinmux-ids = <
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MX23_PAD_GPMI_D00__SSP2_DATA0
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MX23_PAD_GPMI_D01__SSP2_DATA1
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MX23_PAD_GPMI_D02__SSP2_DATA2
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MX23_PAD_GPMI_D03__SSP2_DATA3
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MX23_PAD_GPMI_RDY1__SSP2_CMD
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MX23_PAD_GPMI_WRN__SSP2_SCK
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>;
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fsl,drive-strength = <MXS_DRIVE_8mA>;
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fsl,voltage = <MXS_VOLTAGE_HIGH>;
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fsl,pull-up = <MXS_PULL_ENABLE>;
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};
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mmc1_8bit_pins_a: mmc1-8bit@0 {
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reg = <0>;
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fsl,pinmux-ids = <
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MX23_PAD_GPMI_D00__SSP2_DATA0
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MX23_PAD_GPMI_D01__SSP2_DATA1
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MX23_PAD_GPMI_D02__SSP2_DATA2
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MX23_PAD_GPMI_D03__SSP2_DATA3
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MX23_PAD_GPMI_D04__SSP2_DATA4
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MX23_PAD_GPMI_D05__SSP2_DATA5
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MX23_PAD_GPMI_D06__SSP2_DATA6
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MX23_PAD_GPMI_D07__SSP2_DATA7
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MX23_PAD_GPMI_RDY1__SSP2_CMD
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MX23_PAD_GPMI_WRN__SSP2_SCK
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>;
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fsl,drive-strength = <MXS_DRIVE_8mA>;
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fsl,voltage = <MXS_VOLTAGE_HIGH>;
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fsl,pull-up = <MXS_PULL_ENABLE>;
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};
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pwm2_pins_a: pwm2@0 {
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reg = <0>;
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fsl,pinmux-ids = <
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MX23_PAD_PWM2__PWM2
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>;
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fsl,drive-strength = <MXS_DRIVE_4mA>;
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fsl,voltage = <MXS_VOLTAGE_HIGH>;
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fsl,pull-up = <MXS_PULL_DISABLE>;
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};
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lcdif_24bit_pins_a: lcdif-24bit@0 {
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reg = <0>;
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fsl,pinmux-ids = <
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MX23_PAD_LCD_D00__LCD_D00
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MX23_PAD_LCD_D01__LCD_D01
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MX23_PAD_LCD_D02__LCD_D02
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MX23_PAD_LCD_D03__LCD_D03
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MX23_PAD_LCD_D04__LCD_D04
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MX23_PAD_LCD_D05__LCD_D05
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MX23_PAD_LCD_D06__LCD_D06
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MX23_PAD_LCD_D07__LCD_D07
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MX23_PAD_LCD_D08__LCD_D08
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MX23_PAD_LCD_D09__LCD_D09
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MX23_PAD_LCD_D10__LCD_D10
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MX23_PAD_LCD_D11__LCD_D11
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MX23_PAD_LCD_D12__LCD_D12
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MX23_PAD_LCD_D13__LCD_D13
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MX23_PAD_LCD_D14__LCD_D14
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MX23_PAD_LCD_D15__LCD_D15
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MX23_PAD_LCD_D16__LCD_D16
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MX23_PAD_LCD_D17__LCD_D17
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MX23_PAD_GPMI_D08__LCD_D18
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MX23_PAD_GPMI_D09__LCD_D19
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MX23_PAD_GPMI_D10__LCD_D20
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MX23_PAD_GPMI_D11__LCD_D21
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MX23_PAD_GPMI_D12__LCD_D22
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MX23_PAD_GPMI_D13__LCD_D23
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MX23_PAD_LCD_DOTCK__LCD_DOTCK
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MX23_PAD_LCD_ENABLE__LCD_ENABLE
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MX23_PAD_LCD_HSYNC__LCD_HSYNC
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MX23_PAD_LCD_VSYNC__LCD_VSYNC
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>;
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fsl,drive-strength = <MXS_DRIVE_4mA>;
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fsl,voltage = <MXS_VOLTAGE_HIGH>;
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fsl,pull-up = <MXS_PULL_DISABLE>;
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};
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spi2_pins_a: spi2@0 {
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reg = <0>;
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fsl,pinmux-ids = <
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MX23_PAD_GPMI_WRN__SSP2_SCK
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MX23_PAD_GPMI_RDY1__SSP2_CMD
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MX23_PAD_GPMI_D00__SSP2_DATA0
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MX23_PAD_GPMI_D03__SSP2_DATA3
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>;
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fsl,drive-strength = <MXS_DRIVE_8mA>;
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fsl,voltage = <MXS_VOLTAGE_HIGH>;
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fsl,pull-up = <MXS_PULL_ENABLE>;
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};
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i2c_pins_a: i2c@0 {
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reg = <0>;
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fsl,pinmux-ids = <
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MX23_PAD_I2C_SCL__I2C_SCL
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MX23_PAD_I2C_SDA__I2C_SDA
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>;
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fsl,drive-strength = <MXS_DRIVE_8mA>;
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fsl,voltage = <MXS_VOLTAGE_HIGH>;
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fsl,pull-up = <MXS_PULL_ENABLE>;
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};
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i2c_pins_b: i2c@1 {
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reg = <1>;
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fsl,pinmux-ids = <
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MX23_PAD_LCD_ENABLE__I2C_SCL
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MX23_PAD_LCD_HSYNC__I2C_SDA
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>;
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fsl,drive-strength = <MXS_DRIVE_8mA>;
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fsl,voltage = <MXS_VOLTAGE_HIGH>;
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fsl,pull-up = <MXS_PULL_ENABLE>;
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};
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i2c_pins_c: i2c@2 {
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reg = <2>;
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fsl,pinmux-ids = <
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MX23_PAD_SSP1_DATA1__I2C_SCL
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MX23_PAD_SSP1_DATA2__I2C_SDA
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>;
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fsl,drive-strength = <MXS_DRIVE_8mA>;
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fsl,voltage = <MXS_VOLTAGE_HIGH>;
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fsl,pull-up = <MXS_PULL_ENABLE>;
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};
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};
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digctl@8001c000 {
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compatible = "fsl,imx23-digctl";
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reg = <0x8001c000 2000>;
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status = "disabled";
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};
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emi@80020000 {
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reg = <0x80020000 0x2000>;
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status = "disabled";
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};
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dma_apbx: dma-apbx@80024000 {
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compatible = "fsl,imx23-dma-apbx";
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reg = <0x80024000 0x2000>;
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interrupts = <7 5 9 26
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19 0 25 23
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60 58 9 0
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0 0 0 0>;
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interrupt-names = "audio-adc", "audio-dac", "spdif-tx", "i2c",
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"saif0", "empty", "auart0-rx", "auart0-tx",
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"auart1-rx", "auart1-tx", "saif1", "empty",
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"empty", "empty", "empty", "empty";
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#dma-cells = <1>;
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dma-channels = <16>;
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clocks = <&clks 16>;
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};
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dcp@80028000 {
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compatible = "fsl,imx23-dcp";
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reg = <0x80028000 0x2000>;
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interrupts = <53 54>;
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status = "okay";
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};
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pxp@8002a000 {
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reg = <0x8002a000 0x2000>;
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status = "disabled";
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};
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ocotp@8002c000 {
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compatible = "fsl,imx23-ocotp", "fsl,ocotp";
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#address-cells = <1>;
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|
#size-cells = <1>;
|
|
reg = <0x8002c000 0x2000>;
|
|
clocks = <&clks 15>;
|
|
};
|
|
|
|
axi-ahb@8002e000 {
|
|
reg = <0x8002e000 0x2000>;
|
|
status = "disabled";
|
|
};
|
|
|
|
lcdif@80030000 {
|
|
compatible = "fsl,imx23-lcdif";
|
|
reg = <0x80030000 2000>;
|
|
interrupts = <46 45>;
|
|
clocks = <&clks 38>;
|
|
status = "disabled";
|
|
};
|
|
|
|
ssp1: ssp@80034000 {
|
|
reg = <0x80034000 0x2000>;
|
|
interrupts = <2>;
|
|
clocks = <&clks 33>;
|
|
dmas = <&dma_apbh 2>;
|
|
dma-names = "rx-tx";
|
|
status = "disabled";
|
|
};
|
|
|
|
tvenc@80038000 {
|
|
reg = <0x80038000 0x2000>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
apbx@80040000 {
|
|
compatible = "simple-bus";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
reg = <0x80040000 0x40000>;
|
|
ranges;
|
|
|
|
clks: clkctrl@80040000 {
|
|
compatible = "fsl,imx23-clkctrl", "fsl,clkctrl";
|
|
reg = <0x80040000 0x2000>;
|
|
#clock-cells = <1>;
|
|
};
|
|
|
|
saif0: saif@80042000 {
|
|
reg = <0x80042000 0x2000>;
|
|
dmas = <&dma_apbx 4>;
|
|
dma-names = "rx-tx";
|
|
status = "disabled";
|
|
};
|
|
|
|
power@80044000 {
|
|
reg = <0x80044000 0x2000>;
|
|
status = "disabled";
|
|
};
|
|
|
|
saif1: saif@80046000 {
|
|
reg = <0x80046000 0x2000>;
|
|
dmas = <&dma_apbx 10>;
|
|
dma-names = "rx-tx";
|
|
status = "disabled";
|
|
};
|
|
|
|
audio-out@80048000 {
|
|
reg = <0x80048000 0x2000>;
|
|
dmas = <&dma_apbx 1>;
|
|
dma-names = "tx";
|
|
status = "disabled";
|
|
};
|
|
|
|
audio-in@8004c000 {
|
|
reg = <0x8004c000 0x2000>;
|
|
dmas = <&dma_apbx 0>;
|
|
dma-names = "rx";
|
|
status = "disabled";
|
|
};
|
|
|
|
lradc: lradc@80050000 {
|
|
compatible = "fsl,imx23-lradc";
|
|
reg = <0x80050000 0x2000>;
|
|
interrupts = <36 37 38 39 40 41 42 43 44>;
|
|
status = "disabled";
|
|
clocks = <&clks 26>;
|
|
#io-channel-cells = <1>;
|
|
};
|
|
|
|
spdif@80054000 {
|
|
reg = <0x80054000 2000>;
|
|
dmas = <&dma_apbx 2>;
|
|
dma-names = "tx";
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c: i2c@80058000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "fsl,imx23-i2c";
|
|
reg = <0x80058000 0x2000>;
|
|
interrupts = <27>;
|
|
clock-frequency = <100000>;
|
|
dmas = <&dma_apbx 3>;
|
|
dma-names = "rx-tx";
|
|
status = "disabled";
|
|
};
|
|
|
|
rtc@8005c000 {
|
|
compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
|
|
reg = <0x8005c000 0x2000>;
|
|
interrupts = <22>;
|
|
};
|
|
|
|
pwm: pwm@80064000 {
|
|
compatible = "fsl,imx23-pwm";
|
|
reg = <0x80064000 0x2000>;
|
|
clocks = <&clks 30>;
|
|
#pwm-cells = <2>;
|
|
fsl,pwm-number = <5>;
|
|
status = "disabled";
|
|
};
|
|
|
|
timrot@80068000 {
|
|
compatible = "fsl,imx23-timrot", "fsl,timrot";
|
|
reg = <0x80068000 0x2000>;
|
|
interrupts = <28 29 30 31>;
|
|
clocks = <&clks 28>;
|
|
};
|
|
|
|
auart0: serial@8006c000 {
|
|
compatible = "fsl,imx23-auart";
|
|
reg = <0x8006c000 0x2000>;
|
|
interrupts = <24>;
|
|
clocks = <&clks 32>;
|
|
dmas = <&dma_apbx 6>, <&dma_apbx 7>;
|
|
dma-names = "rx", "tx";
|
|
status = "disabled";
|
|
};
|
|
|
|
auart1: serial@8006e000 {
|
|
compatible = "fsl,imx23-auart";
|
|
reg = <0x8006e000 0x2000>;
|
|
interrupts = <59>;
|
|
clocks = <&clks 32>;
|
|
dmas = <&dma_apbx 8>, <&dma_apbx 9>;
|
|
dma-names = "rx", "tx";
|
|
status = "disabled";
|
|
};
|
|
|
|
duart: serial@80070000 {
|
|
compatible = "arm,pl011", "arm,primecell";
|
|
reg = <0x80070000 0x2000>;
|
|
interrupts = <0>;
|
|
clocks = <&clks 32>, <&clks 16>;
|
|
clock-names = "uart", "apb_pclk";
|
|
status = "disabled";
|
|
};
|
|
|
|
usbphy0: usbphy@8007c000 {
|
|
compatible = "fsl,imx23-usbphy";
|
|
reg = <0x8007c000 0x2000>;
|
|
clocks = <&clks 41>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
};
|
|
|
|
ahb@80080000 {
|
|
compatible = "simple-bus";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
reg = <0x80080000 0x80000>;
|
|
ranges;
|
|
|
|
usb0: usb@80080000 {
|
|
compatible = "fsl,imx23-usb", "fsl,imx27-usb";
|
|
reg = <0x80080000 0x40000>;
|
|
interrupts = <11>;
|
|
fsl,usbphy = <&usbphy0>;
|
|
clocks = <&clks 40>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
iio-hwmon {
|
|
compatible = "iio-hwmon";
|
|
io-channels = <&lradc 8>;
|
|
};
|
|
};
|