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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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33f9e02495
Enabling parport pc driver on a B2600 (and probably other 64bit PARISC systems) produced following BUG: CPU: 0 PID: 1 Comm: swapper Not tainted 4.12.0-rc5-30198-g1132d5e #156 task: 000000009e050000 task.stack: 000000009e04c000 YZrvWESTHLNXBCVMcbcbcbcbOGFRQPDI PSW: 00001000000001101111111100001111 Not tainted r00-03 000000ff0806ff0f 000000009e04c990 0000000040871b78 000000009e04cac0 r04-07 0000000040c14de0 ffffffffffffffff 000000009e07f098 000000009d82d200 r08-11 000000009d82d210 0000000000000378 0000000000000000 0000000040c345e0 r12-15 0000000000000005 0000000040c345e0 0000000000000000 0000000040c9d5e0 r16-19 0000000040c345e0 00000000f00001c4 00000000f00001bc 0000000000000061 r20-23 000000009e04ce28 0000000000000010 0000000000000010 0000000040b89e40 r24-27 0000000000000003 0000000000ffffff 000000009d82d210 0000000040c14de0 r28-31 0000000000000000 000000009e04ca90 000000009e04cb40 0000000000000000 sr00-03 0000000000000000 0000000000000000 0000000000000000 0000000000000000 sr04-07 0000000000000000 0000000000000000 0000000000000000 0000000000000000 IASQ: 0000000000000000 0000000000000000 IAOQ: 00000000404aece0 00000000404aece4 IIR: 03ffe01f ISR: 0000000010340000 IOR: 000001781304cac8 CPU: 0 CR30: 000000009e04c000 CR31: 00000000e2976de2 ORIG_R28: 0000000000000200 IAOQ[0]: sba_dma_supported+0x80/0xd0 IAOQ[1]: sba_dma_supported+0x84/0xd0 RP(r2): parport_pc_probe_port+0x178/0x1200 Cause is a call to dma_coerce_mask_and_coherenet in parport_pc_probe_port, which PARISC DMA API doesn't handle very nicely. This commit gives back DMA_ERROR_CODE for DMA API calls, if device isn't capable of DMA transaction. Cc: <stable@vger.kernel.org> # v3.13+ Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Helge Deller <deller@gmx.de>
90 lines
2.6 KiB
C
90 lines
2.6 KiB
C
#ifndef _PARISC_DMA_MAPPING_H
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#define _PARISC_DMA_MAPPING_H
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#include <asm/cacheflush.h>
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/*
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** We need to support 4 different coherent dma models with one binary:
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**
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** I/O MMU consistent method dma_sync behavior
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** ============= ====================== =======================
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** a) PA-7x00LC uncachable host memory flush/purge
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** b) U2/Uturn cachable host memory NOP
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** c) Ike/Astro cachable host memory NOP
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** d) EPIC/SAGA memory on EPIC/SAGA flush/reset DMA channel
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**
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** PA-7[13]00LC processors have a GSC bus interface and no I/O MMU.
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**
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** Systems (eg PCX-T workstations) that don't fall into the above
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** categories will need to modify the needed drivers to perform
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** flush/purge and allocate "regular" cacheable pages for everything.
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*/
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#define DMA_ERROR_CODE (~(dma_addr_t)0)
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#ifdef CONFIG_PA11
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extern const struct dma_map_ops pcxl_dma_ops;
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extern const struct dma_map_ops pcx_dma_ops;
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#endif
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extern const struct dma_map_ops *hppa_dma_ops;
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static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
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{
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return hppa_dma_ops;
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}
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static inline void
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dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction)
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{
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if (hppa_dma_ops->sync_single_for_cpu)
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flush_kernel_dcache_range((unsigned long)vaddr, size);
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}
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static inline void *
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parisc_walk_tree(struct device *dev)
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{
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struct device *otherdev;
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if(likely(dev->platform_data != NULL))
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return dev->platform_data;
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/* OK, just traverse the bus to find it */
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for(otherdev = dev->parent; otherdev;
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otherdev = otherdev->parent) {
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if(otherdev->platform_data) {
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dev->platform_data = otherdev->platform_data;
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break;
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}
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}
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return dev->platform_data;
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}
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#define GET_IOC(dev) ({ \
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void *__pdata = parisc_walk_tree(dev); \
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__pdata ? HBA_DATA(__pdata)->iommu : NULL; \
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})
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#ifdef CONFIG_IOMMU_CCIO
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struct parisc_device;
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struct ioc;
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void * ccio_get_iommu(const struct parisc_device *dev);
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int ccio_request_resource(const struct parisc_device *dev,
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struct resource *res);
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int ccio_allocate_resource(const struct parisc_device *dev,
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struct resource *res, unsigned long size,
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unsigned long min, unsigned long max, unsigned long align);
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#else /* !CONFIG_IOMMU_CCIO */
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#define ccio_get_iommu(dev) NULL
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#define ccio_request_resource(dev, res) insert_resource(&iomem_resource, res)
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#define ccio_allocate_resource(dev, res, size, min, max, align) \
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allocate_resource(&iomem_resource, res, size, min, max, \
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align, NULL, NULL)
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#endif /* !CONFIG_IOMMU_CCIO */
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#ifdef CONFIG_IOMMU_SBA
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struct parisc_device;
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void * sba_get_iommu(struct parisc_device *dev);
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#endif
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#endif
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