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e53c077248
This patch adds the Broadcom GISB arbiter Device Tree binding that is used on all Broadcom Set-top-box System-on-a-chip. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
31 lines
968 B
Plaintext
31 lines
968 B
Plaintext
Broadcom GISB bus Arbiter controller
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Required properties:
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- compatible: should be "brcm,gisb-arb"
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- reg: specifies the base physical address and size of the registers
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- interrupt-parent: specifies the phandle to the parent interrupt controller
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this arbiter gets interrupt line from
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- interrupts: specifies the two interrupts (timeout and TEA) to be used from
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the parent interrupt controller
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Optional properties:
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- brcm,gisb-arb-master-mask: 32-bits wide bitmask used to specify which GISB
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masters are valid at the system level
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- brcm,gisb-arb-master-names: string list of the litteral name of the GISB
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masters. Should match the number of bits set in brcm,gisb-master-mask and
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the order in which they appear
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Example:
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gisb-arb@f0400000 {
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compatible = "brcm,gisb-arb";
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reg = <0xf0400000 0x800>;
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interrupts = <0>, <2>;
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interrupt-parent = <&sun_l2_intc>;
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brcm,gisb-arb-master-mask = <0x7>;
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brcm,gisb-arb-master-names = "bsp_0", "scpu_0", "cpu_0";
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};
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