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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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5f85757572
A few PHY drivers have the GPLv2 license text. They then either have a MODULE_LICENSE() of GPLv2+, or an SPDX tag of GPLv2+. Since the license text is much easier to understand than either the SPDX tag or the MODULE_LICENSE, use it as the definitive source of the licence, and fixup with others when there are contradictions. Cc: Russell King <rmk+kernel@armlinux.org.uk> Cc: Jonas Jensen <jonas.jensen@gmail.com> Cc: Laurent Pinchart <laurentp@cse-semaphore.com> Cc: Paulius Zaleckas <paulius.zaleckas@teltonika.lt> Cc: Scott Wood <scottwood@freescale.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Andrew F. Davis <afd@ti.com> Acked-by: Dan Murphy <dmurphy@ti.com> Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
191 lines
4.3 KiB
C
191 lines
4.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/* MOXA ART Ethernet (RTL8201CP) MDIO interface driver
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*
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* Copyright (C) 2013 Jonas Jensen <jonas.jensen@gmail.com>
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*/
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#include <linux/delay.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/of_address.h>
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#include <linux/of_mdio.h>
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#include <linux/phy.h>
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#include <linux/platform_device.h>
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#include <linux/regulator/consumer.h>
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#define REG_PHY_CTRL 0
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#define REG_PHY_WRITE_DATA 4
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/* REG_PHY_CTRL */
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#define MIIWR BIT(27) /* init write sequence (auto cleared)*/
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#define MIIRD BIT(26)
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#define REGAD_MASK 0x3e00000
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#define PHYAD_MASK 0x1f0000
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#define MIIRDATA_MASK 0xffff
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/* REG_PHY_WRITE_DATA */
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#define MIIWDATA_MASK 0xffff
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struct moxart_mdio_data {
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void __iomem *base;
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};
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static int moxart_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
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{
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struct moxart_mdio_data *data = bus->priv;
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u32 ctrl = 0;
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unsigned int count = 5;
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dev_dbg(&bus->dev, "%s\n", __func__);
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ctrl |= MIIRD | ((mii_id << 16) & PHYAD_MASK) |
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((regnum << 21) & REGAD_MASK);
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writel(ctrl, data->base + REG_PHY_CTRL);
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do {
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ctrl = readl(data->base + REG_PHY_CTRL);
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if (!(ctrl & MIIRD))
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return ctrl & MIIRDATA_MASK;
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mdelay(10);
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count--;
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} while (count > 0);
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dev_dbg(&bus->dev, "%s timed out\n", __func__);
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return -ETIMEDOUT;
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}
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static int moxart_mdio_write(struct mii_bus *bus, int mii_id,
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int regnum, u16 value)
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{
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struct moxart_mdio_data *data = bus->priv;
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u32 ctrl = 0;
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unsigned int count = 5;
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dev_dbg(&bus->dev, "%s\n", __func__);
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ctrl |= MIIWR | ((mii_id << 16) & PHYAD_MASK) |
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((regnum << 21) & REGAD_MASK);
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value &= MIIWDATA_MASK;
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writel(value, data->base + REG_PHY_WRITE_DATA);
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writel(ctrl, data->base + REG_PHY_CTRL);
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do {
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ctrl = readl(data->base + REG_PHY_CTRL);
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if (!(ctrl & MIIWR))
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return 0;
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mdelay(10);
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count--;
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} while (count > 0);
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dev_dbg(&bus->dev, "%s timed out\n", __func__);
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return -ETIMEDOUT;
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}
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static int moxart_mdio_reset(struct mii_bus *bus)
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{
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int data, i;
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for (i = 0; i < PHY_MAX_ADDR; i++) {
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data = moxart_mdio_read(bus, i, MII_BMCR);
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if (data < 0)
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continue;
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data |= BMCR_RESET;
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if (moxart_mdio_write(bus, i, MII_BMCR, data) < 0)
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continue;
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}
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return 0;
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}
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static int moxart_mdio_probe(struct platform_device *pdev)
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{
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struct device_node *np = pdev->dev.of_node;
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struct mii_bus *bus;
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struct moxart_mdio_data *data;
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struct resource *res;
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int ret, i;
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bus = mdiobus_alloc_size(sizeof(*data));
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if (!bus)
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return -ENOMEM;
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bus->name = "MOXA ART Ethernet MII";
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bus->read = &moxart_mdio_read;
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bus->write = &moxart_mdio_write;
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bus->reset = &moxart_mdio_reset;
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snprintf(bus->id, MII_BUS_ID_SIZE, "%s-%d-mii", pdev->name, pdev->id);
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bus->parent = &pdev->dev;
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/* Setting PHY_IGNORE_INTERRUPT here even if it has no effect,
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* of_mdiobus_register() sets these PHY_POLL.
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* Ideally, the interrupt from MAC controller could be used to
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* detect link state changes, not polling, i.e. if there was
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* a way phy_driver could set PHY_HAS_INTERRUPT but have that
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* interrupt handled in ethernet drivercode.
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*/
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for (i = 0; i < PHY_MAX_ADDR; i++)
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bus->irq[i] = PHY_IGNORE_INTERRUPT;
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data = bus->priv;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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data->base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(data->base)) {
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ret = PTR_ERR(data->base);
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goto err_out_free_mdiobus;
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}
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ret = of_mdiobus_register(bus, np);
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if (ret < 0)
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goto err_out_free_mdiobus;
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platform_set_drvdata(pdev, bus);
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return 0;
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err_out_free_mdiobus:
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mdiobus_free(bus);
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return ret;
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}
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static int moxart_mdio_remove(struct platform_device *pdev)
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{
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struct mii_bus *bus = platform_get_drvdata(pdev);
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mdiobus_unregister(bus);
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mdiobus_free(bus);
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return 0;
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}
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static const struct of_device_id moxart_mdio_dt_ids[] = {
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{ .compatible = "moxa,moxart-mdio" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, moxart_mdio_dt_ids);
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static struct platform_driver moxart_mdio_driver = {
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.probe = moxart_mdio_probe,
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.remove = moxart_mdio_remove,
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.driver = {
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.name = "moxart-mdio",
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.of_match_table = moxart_mdio_dt_ids,
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},
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};
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module_platform_driver(moxart_mdio_driver);
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MODULE_DESCRIPTION("MOXA ART MDIO interface driver");
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MODULE_AUTHOR("Jonas Jensen <jonas.jensen@gmail.com>");
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MODULE_LICENSE("GPL v2");
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