mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-21 15:00:42 +07:00
318e741ee1
The MCLK clock is made optional for cs42l51 codec.
However, ASoC DAPM clock supply widget, expects the clock to be defined
unconditionally.
Register MCLK DAPM conditionally in codec driver,
depending on clock presence in DT.
Fixes: 5e8d63a726
("ASoC: cs42l51: add mclk support")
Signed-off-by: Olivier Moysan <olivier.moysan@st.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
597 lines
17 KiB
C
597 lines
17 KiB
C
/*
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* cs42l51.c
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*
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* ASoC Driver for Cirrus Logic CS42L51 codecs
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*
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* Copyright (c) 2010 Arnaud Patard <apatard@mandriva.com>
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*
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* Based on cs4270.c - Copyright (c) Freescale Semiconductor
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* For now:
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* - Only I2C is support. Not SPI
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* - master mode *NOT* supported
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*/
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#include <linux/clk.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <sound/core.h>
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#include <sound/soc.h>
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#include <sound/tlv.h>
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#include <sound/initval.h>
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#include <sound/pcm_params.h>
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#include <sound/pcm.h>
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#include <linux/regmap.h>
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#include "cs42l51.h"
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enum master_slave_mode {
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MODE_SLAVE,
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MODE_SLAVE_AUTO,
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MODE_MASTER,
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};
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struct cs42l51_private {
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unsigned int mclk;
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struct clk *mclk_handle;
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unsigned int audio_mode; /* The mode (I2S or left-justified) */
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enum master_slave_mode func;
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};
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#define CS42L51_FORMATS ( \
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SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | \
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SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S18_3BE | \
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SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE | \
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SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE)
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static int cs42l51_get_chan_mix(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
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unsigned long value = snd_soc_component_read32(component, CS42L51_PCM_MIXER)&3;
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switch (value) {
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default:
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case 0:
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ucontrol->value.enumerated.item[0] = 0;
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break;
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/* same value : (L+R)/2 and (R+L)/2 */
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case 1:
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case 2:
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ucontrol->value.enumerated.item[0] = 1;
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break;
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case 3:
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ucontrol->value.enumerated.item[0] = 2;
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break;
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}
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return 0;
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}
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#define CHAN_MIX_NORMAL 0x00
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#define CHAN_MIX_BOTH 0x55
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#define CHAN_MIX_SWAP 0xFF
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static int cs42l51_set_chan_mix(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
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unsigned char val;
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switch (ucontrol->value.enumerated.item[0]) {
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default:
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case 0:
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val = CHAN_MIX_NORMAL;
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break;
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case 1:
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val = CHAN_MIX_BOTH;
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break;
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case 2:
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val = CHAN_MIX_SWAP;
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break;
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}
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snd_soc_component_write(component, CS42L51_PCM_MIXER, val);
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return 1;
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}
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static const DECLARE_TLV_DB_SCALE(adc_pcm_tlv, -5150, 50, 0);
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static const DECLARE_TLV_DB_SCALE(tone_tlv, -1050, 150, 0);
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static const DECLARE_TLV_DB_SCALE(aout_tlv, -10200, 50, 0);
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static const DECLARE_TLV_DB_SCALE(boost_tlv, 1600, 1600, 0);
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static const char *chan_mix[] = {
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"L R",
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"L+R",
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"R L",
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};
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static SOC_ENUM_SINGLE_EXT_DECL(cs42l51_chan_mix, chan_mix);
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static const struct snd_kcontrol_new cs42l51_snd_controls[] = {
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SOC_DOUBLE_R_SX_TLV("PCM Playback Volume",
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CS42L51_PCMA_VOL, CS42L51_PCMB_VOL,
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0, 0x19, 0x7F, adc_pcm_tlv),
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SOC_DOUBLE_R("PCM Playback Switch",
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CS42L51_PCMA_VOL, CS42L51_PCMB_VOL, 7, 1, 1),
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SOC_DOUBLE_R_SX_TLV("Analog Playback Volume",
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CS42L51_AOUTA_VOL, CS42L51_AOUTB_VOL,
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0, 0x34, 0xE4, aout_tlv),
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SOC_DOUBLE_R_SX_TLV("ADC Mixer Volume",
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CS42L51_ADCA_VOL, CS42L51_ADCB_VOL,
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0, 0x19, 0x7F, adc_pcm_tlv),
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SOC_DOUBLE_R("ADC Mixer Switch",
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CS42L51_ADCA_VOL, CS42L51_ADCB_VOL, 7, 1, 1),
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SOC_SINGLE("Playback Deemphasis Switch", CS42L51_DAC_CTL, 3, 1, 0),
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SOC_SINGLE("Auto-Mute Switch", CS42L51_DAC_CTL, 2, 1, 0),
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SOC_SINGLE("Soft Ramp Switch", CS42L51_DAC_CTL, 1, 1, 0),
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SOC_SINGLE("Zero Cross Switch", CS42L51_DAC_CTL, 0, 0, 0),
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SOC_DOUBLE_TLV("Mic Boost Volume",
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CS42L51_MIC_CTL, 0, 1, 1, 0, boost_tlv),
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SOC_SINGLE_TLV("Bass Volume", CS42L51_TONE_CTL, 0, 0xf, 1, tone_tlv),
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SOC_SINGLE_TLV("Treble Volume", CS42L51_TONE_CTL, 4, 0xf, 1, tone_tlv),
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SOC_ENUM_EXT("PCM channel mixer",
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cs42l51_chan_mix,
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cs42l51_get_chan_mix, cs42l51_set_chan_mix),
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};
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/*
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* to power down, one must:
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* 1.) Enable the PDN bit
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* 2.) enable power-down for the select channels
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* 3.) disable the PDN bit.
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*/
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static int cs42l51_pdn_event(struct snd_soc_dapm_widget *w,
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struct snd_kcontrol *kcontrol, int event)
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{
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struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
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switch (event) {
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case SND_SOC_DAPM_PRE_PMD:
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snd_soc_component_update_bits(component, CS42L51_POWER_CTL1,
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CS42L51_POWER_CTL1_PDN,
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CS42L51_POWER_CTL1_PDN);
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break;
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default:
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case SND_SOC_DAPM_POST_PMD:
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snd_soc_component_update_bits(component, CS42L51_POWER_CTL1,
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CS42L51_POWER_CTL1_PDN, 0);
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break;
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}
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return 0;
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}
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static const char *cs42l51_dac_names[] = {"Direct PCM",
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"DSP PCM", "ADC"};
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static SOC_ENUM_SINGLE_DECL(cs42l51_dac_mux_enum,
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CS42L51_DAC_CTL, 6, cs42l51_dac_names);
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static const struct snd_kcontrol_new cs42l51_dac_mux_controls =
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SOC_DAPM_ENUM("Route", cs42l51_dac_mux_enum);
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static const char *cs42l51_adcl_names[] = {"AIN1 Left", "AIN2 Left",
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"MIC Left", "MIC+preamp Left"};
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static SOC_ENUM_SINGLE_DECL(cs42l51_adcl_mux_enum,
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CS42L51_ADC_INPUT, 4, cs42l51_adcl_names);
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static const struct snd_kcontrol_new cs42l51_adcl_mux_controls =
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SOC_DAPM_ENUM("Route", cs42l51_adcl_mux_enum);
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static const char *cs42l51_adcr_names[] = {"AIN1 Right", "AIN2 Right",
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"MIC Right", "MIC+preamp Right"};
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static SOC_ENUM_SINGLE_DECL(cs42l51_adcr_mux_enum,
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CS42L51_ADC_INPUT, 6, cs42l51_adcr_names);
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static const struct snd_kcontrol_new cs42l51_adcr_mux_controls =
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SOC_DAPM_ENUM("Route", cs42l51_adcr_mux_enum);
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static const struct snd_soc_dapm_widget cs42l51_dapm_widgets[] = {
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SND_SOC_DAPM_MICBIAS("Mic Bias", CS42L51_MIC_POWER_CTL, 1, 1),
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SND_SOC_DAPM_PGA_E("Left PGA", CS42L51_POWER_CTL1, 3, 1, NULL, 0,
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cs42l51_pdn_event, SND_SOC_DAPM_PRE_POST_PMD),
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SND_SOC_DAPM_PGA_E("Right PGA", CS42L51_POWER_CTL1, 4, 1, NULL, 0,
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cs42l51_pdn_event, SND_SOC_DAPM_PRE_POST_PMD),
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SND_SOC_DAPM_ADC_E("Left ADC", "Left HiFi Capture",
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CS42L51_POWER_CTL1, 1, 1,
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cs42l51_pdn_event, SND_SOC_DAPM_PRE_POST_PMD),
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SND_SOC_DAPM_ADC_E("Right ADC", "Right HiFi Capture",
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CS42L51_POWER_CTL1, 2, 1,
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cs42l51_pdn_event, SND_SOC_DAPM_PRE_POST_PMD),
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SND_SOC_DAPM_DAC_E("Left DAC", "Left HiFi Playback",
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CS42L51_POWER_CTL1, 5, 1,
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cs42l51_pdn_event, SND_SOC_DAPM_PRE_POST_PMD),
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SND_SOC_DAPM_DAC_E("Right DAC", "Right HiFi Playback",
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CS42L51_POWER_CTL1, 6, 1,
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cs42l51_pdn_event, SND_SOC_DAPM_PRE_POST_PMD),
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/* analog/mic */
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SND_SOC_DAPM_INPUT("AIN1L"),
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SND_SOC_DAPM_INPUT("AIN1R"),
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SND_SOC_DAPM_INPUT("AIN2L"),
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SND_SOC_DAPM_INPUT("AIN2R"),
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SND_SOC_DAPM_INPUT("MICL"),
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SND_SOC_DAPM_INPUT("MICR"),
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SND_SOC_DAPM_MIXER("Mic Preamp Left",
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CS42L51_MIC_POWER_CTL, 2, 1, NULL, 0),
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SND_SOC_DAPM_MIXER("Mic Preamp Right",
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CS42L51_MIC_POWER_CTL, 3, 1, NULL, 0),
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/* HP */
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SND_SOC_DAPM_OUTPUT("HPL"),
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SND_SOC_DAPM_OUTPUT("HPR"),
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/* mux */
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SND_SOC_DAPM_MUX("DAC Mux", SND_SOC_NOPM, 0, 0,
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&cs42l51_dac_mux_controls),
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SND_SOC_DAPM_MUX("PGA-ADC Mux Left", SND_SOC_NOPM, 0, 0,
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&cs42l51_adcl_mux_controls),
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SND_SOC_DAPM_MUX("PGA-ADC Mux Right", SND_SOC_NOPM, 0, 0,
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&cs42l51_adcr_mux_controls),
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};
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static const struct snd_soc_dapm_widget cs42l51_dapm_mclk_widgets[] = {
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SND_SOC_DAPM_CLOCK_SUPPLY("MCLK")
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};
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static const struct snd_soc_dapm_route cs42l51_routes[] = {
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{"HPL", NULL, "Left DAC"},
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{"HPR", NULL, "Right DAC"},
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{"Left ADC", NULL, "Left PGA"},
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{"Right ADC", NULL, "Right PGA"},
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{"Mic Preamp Left", NULL, "MICL"},
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{"Mic Preamp Right", NULL, "MICR"},
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{"PGA-ADC Mux Left", "AIN1 Left", "AIN1L" },
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{"PGA-ADC Mux Left", "AIN2 Left", "AIN2L" },
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{"PGA-ADC Mux Left", "MIC Left", "MICL" },
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{"PGA-ADC Mux Left", "MIC+preamp Left", "Mic Preamp Left" },
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{"PGA-ADC Mux Right", "AIN1 Right", "AIN1R" },
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{"PGA-ADC Mux Right", "AIN2 Right", "AIN2R" },
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{"PGA-ADC Mux Right", "MIC Right", "MICR" },
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{"PGA-ADC Mux Right", "MIC+preamp Right", "Mic Preamp Right" },
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{"Left PGA", NULL, "PGA-ADC Mux Left"},
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{"Right PGA", NULL, "PGA-ADC Mux Right"},
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};
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static int cs42l51_set_dai_fmt(struct snd_soc_dai *codec_dai,
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unsigned int format)
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{
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struct snd_soc_component *component = codec_dai->component;
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struct cs42l51_private *cs42l51 = snd_soc_component_get_drvdata(component);
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switch (format & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_I2S:
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case SND_SOC_DAIFMT_LEFT_J:
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case SND_SOC_DAIFMT_RIGHT_J:
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cs42l51->audio_mode = format & SND_SOC_DAIFMT_FORMAT_MASK;
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break;
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default:
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dev_err(component->dev, "invalid DAI format\n");
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return -EINVAL;
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}
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switch (format & SND_SOC_DAIFMT_MASTER_MASK) {
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case SND_SOC_DAIFMT_CBM_CFM:
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cs42l51->func = MODE_MASTER;
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break;
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case SND_SOC_DAIFMT_CBS_CFS:
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cs42l51->func = MODE_SLAVE_AUTO;
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break;
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default:
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dev_err(component->dev, "Unknown master/slave configuration\n");
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return -EINVAL;
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}
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return 0;
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}
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struct cs42l51_ratios {
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unsigned int ratio;
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unsigned char speed_mode;
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unsigned char mclk;
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};
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static struct cs42l51_ratios slave_ratios[] = {
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{ 512, CS42L51_QSM_MODE, 0 }, { 768, CS42L51_QSM_MODE, 0 },
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{ 1024, CS42L51_QSM_MODE, 0 }, { 1536, CS42L51_QSM_MODE, 0 },
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{ 2048, CS42L51_QSM_MODE, 0 }, { 3072, CS42L51_QSM_MODE, 0 },
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{ 256, CS42L51_HSM_MODE, 0 }, { 384, CS42L51_HSM_MODE, 0 },
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{ 512, CS42L51_HSM_MODE, 0 }, { 768, CS42L51_HSM_MODE, 0 },
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{ 1024, CS42L51_HSM_MODE, 0 }, { 1536, CS42L51_HSM_MODE, 0 },
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{ 128, CS42L51_SSM_MODE, 0 }, { 192, CS42L51_SSM_MODE, 0 },
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{ 256, CS42L51_SSM_MODE, 0 }, { 384, CS42L51_SSM_MODE, 0 },
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{ 512, CS42L51_SSM_MODE, 0 }, { 768, CS42L51_SSM_MODE, 0 },
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{ 128, CS42L51_DSM_MODE, 0 }, { 192, CS42L51_DSM_MODE, 0 },
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{ 256, CS42L51_DSM_MODE, 0 }, { 384, CS42L51_DSM_MODE, 0 },
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};
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static struct cs42l51_ratios slave_auto_ratios[] = {
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{ 1024, CS42L51_QSM_MODE, 0 }, { 1536, CS42L51_QSM_MODE, 0 },
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{ 2048, CS42L51_QSM_MODE, 1 }, { 3072, CS42L51_QSM_MODE, 1 },
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{ 512, CS42L51_HSM_MODE, 0 }, { 768, CS42L51_HSM_MODE, 0 },
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{ 1024, CS42L51_HSM_MODE, 1 }, { 1536, CS42L51_HSM_MODE, 1 },
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{ 256, CS42L51_SSM_MODE, 0 }, { 384, CS42L51_SSM_MODE, 0 },
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{ 512, CS42L51_SSM_MODE, 1 }, { 768, CS42L51_SSM_MODE, 1 },
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{ 128, CS42L51_DSM_MODE, 0 }, { 192, CS42L51_DSM_MODE, 0 },
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{ 256, CS42L51_DSM_MODE, 1 }, { 384, CS42L51_DSM_MODE, 1 },
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};
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static int cs42l51_set_dai_sysclk(struct snd_soc_dai *codec_dai,
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int clk_id, unsigned int freq, int dir)
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{
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struct snd_soc_component *component = codec_dai->component;
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struct cs42l51_private *cs42l51 = snd_soc_component_get_drvdata(component);
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cs42l51->mclk = freq;
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return 0;
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}
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static int cs42l51_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_component *component = dai->component;
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struct cs42l51_private *cs42l51 = snd_soc_component_get_drvdata(component);
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int ret;
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unsigned int i;
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unsigned int rate;
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unsigned int ratio;
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struct cs42l51_ratios *ratios = NULL;
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int nr_ratios = 0;
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int intf_ctl, power_ctl, fmt;
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switch (cs42l51->func) {
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case MODE_MASTER:
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return -EINVAL;
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case MODE_SLAVE:
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ratios = slave_ratios;
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nr_ratios = ARRAY_SIZE(slave_ratios);
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break;
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case MODE_SLAVE_AUTO:
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ratios = slave_auto_ratios;
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nr_ratios = ARRAY_SIZE(slave_auto_ratios);
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break;
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}
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/* Figure out which MCLK/LRCK ratio to use */
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rate = params_rate(params); /* Sampling rate, in Hz */
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ratio = cs42l51->mclk / rate; /* MCLK/LRCK ratio */
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for (i = 0; i < nr_ratios; i++) {
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if (ratios[i].ratio == ratio)
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break;
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}
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if (i == nr_ratios) {
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/* We did not find a matching ratio */
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dev_err(component->dev, "could not find matching ratio\n");
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return -EINVAL;
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}
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intf_ctl = snd_soc_component_read32(component, CS42L51_INTF_CTL);
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power_ctl = snd_soc_component_read32(component, CS42L51_MIC_POWER_CTL);
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intf_ctl &= ~(CS42L51_INTF_CTL_MASTER | CS42L51_INTF_CTL_ADC_I2S
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| CS42L51_INTF_CTL_DAC_FORMAT(7));
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power_ctl &= ~(CS42L51_MIC_POWER_CTL_SPEED(3)
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| CS42L51_MIC_POWER_CTL_MCLK_DIV2);
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switch (cs42l51->func) {
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case MODE_MASTER:
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intf_ctl |= CS42L51_INTF_CTL_MASTER;
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power_ctl |= CS42L51_MIC_POWER_CTL_SPEED(ratios[i].speed_mode);
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break;
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case MODE_SLAVE:
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power_ctl |= CS42L51_MIC_POWER_CTL_SPEED(ratios[i].speed_mode);
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break;
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case MODE_SLAVE_AUTO:
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|
power_ctl |= CS42L51_MIC_POWER_CTL_AUTO;
|
|
break;
|
|
}
|
|
|
|
switch (cs42l51->audio_mode) {
|
|
case SND_SOC_DAIFMT_I2S:
|
|
intf_ctl |= CS42L51_INTF_CTL_ADC_I2S;
|
|
intf_ctl |= CS42L51_INTF_CTL_DAC_FORMAT(CS42L51_DAC_DIF_I2S);
|
|
break;
|
|
case SND_SOC_DAIFMT_LEFT_J:
|
|
intf_ctl |= CS42L51_INTF_CTL_DAC_FORMAT(CS42L51_DAC_DIF_LJ24);
|
|
break;
|
|
case SND_SOC_DAIFMT_RIGHT_J:
|
|
switch (params_width(params)) {
|
|
case 16:
|
|
fmt = CS42L51_DAC_DIF_RJ16;
|
|
break;
|
|
case 18:
|
|
fmt = CS42L51_DAC_DIF_RJ18;
|
|
break;
|
|
case 20:
|
|
fmt = CS42L51_DAC_DIF_RJ20;
|
|
break;
|
|
case 24:
|
|
fmt = CS42L51_DAC_DIF_RJ24;
|
|
break;
|
|
default:
|
|
dev_err(component->dev, "unknown format\n");
|
|
return -EINVAL;
|
|
}
|
|
intf_ctl |= CS42L51_INTF_CTL_DAC_FORMAT(fmt);
|
|
break;
|
|
default:
|
|
dev_err(component->dev, "unknown format\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
if (ratios[i].mclk)
|
|
power_ctl |= CS42L51_MIC_POWER_CTL_MCLK_DIV2;
|
|
|
|
ret = snd_soc_component_write(component, CS42L51_INTF_CTL, intf_ctl);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = snd_soc_component_write(component, CS42L51_MIC_POWER_CTL, power_ctl);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int cs42l51_dai_mute(struct snd_soc_dai *dai, int mute)
|
|
{
|
|
struct snd_soc_component *component = dai->component;
|
|
int reg;
|
|
int mask = CS42L51_DAC_OUT_CTL_DACA_MUTE|CS42L51_DAC_OUT_CTL_DACB_MUTE;
|
|
|
|
reg = snd_soc_component_read32(component, CS42L51_DAC_OUT_CTL);
|
|
|
|
if (mute)
|
|
reg |= mask;
|
|
else
|
|
reg &= ~mask;
|
|
|
|
return snd_soc_component_write(component, CS42L51_DAC_OUT_CTL, reg);
|
|
}
|
|
|
|
static const struct snd_soc_dai_ops cs42l51_dai_ops = {
|
|
.hw_params = cs42l51_hw_params,
|
|
.set_sysclk = cs42l51_set_dai_sysclk,
|
|
.set_fmt = cs42l51_set_dai_fmt,
|
|
.digital_mute = cs42l51_dai_mute,
|
|
};
|
|
|
|
static struct snd_soc_dai_driver cs42l51_dai = {
|
|
.name = "cs42l51-hifi",
|
|
.playback = {
|
|
.stream_name = "Playback",
|
|
.channels_min = 1,
|
|
.channels_max = 2,
|
|
.rates = SNDRV_PCM_RATE_8000_96000,
|
|
.formats = CS42L51_FORMATS,
|
|
},
|
|
.capture = {
|
|
.stream_name = "Capture",
|
|
.channels_min = 1,
|
|
.channels_max = 2,
|
|
.rates = SNDRV_PCM_RATE_8000_96000,
|
|
.formats = CS42L51_FORMATS,
|
|
},
|
|
.ops = &cs42l51_dai_ops,
|
|
};
|
|
|
|
static int cs42l51_component_probe(struct snd_soc_component *component)
|
|
{
|
|
int ret, reg;
|
|
struct snd_soc_dapm_context *dapm;
|
|
struct cs42l51_private *cs42l51;
|
|
|
|
cs42l51 = snd_soc_component_get_drvdata(component);
|
|
dapm = snd_soc_component_get_dapm(component);
|
|
|
|
if (cs42l51->mclk_handle)
|
|
snd_soc_dapm_new_controls(dapm, cs42l51_dapm_mclk_widgets, 1);
|
|
|
|
/*
|
|
* DAC configuration
|
|
* - Use signal processor
|
|
* - auto mute
|
|
* - vol changes immediate
|
|
* - no de-emphasize
|
|
*/
|
|
reg = CS42L51_DAC_CTL_DATA_SEL(1)
|
|
| CS42L51_DAC_CTL_AMUTE | CS42L51_DAC_CTL_DACSZ(0);
|
|
ret = snd_soc_component_write(component, CS42L51_DAC_CTL, reg);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct snd_soc_component_driver soc_component_device_cs42l51 = {
|
|
.probe = cs42l51_component_probe,
|
|
.controls = cs42l51_snd_controls,
|
|
.num_controls = ARRAY_SIZE(cs42l51_snd_controls),
|
|
.dapm_widgets = cs42l51_dapm_widgets,
|
|
.num_dapm_widgets = ARRAY_SIZE(cs42l51_dapm_widgets),
|
|
.dapm_routes = cs42l51_routes,
|
|
.num_dapm_routes = ARRAY_SIZE(cs42l51_routes),
|
|
.idle_bias_on = 1,
|
|
.use_pmdown_time = 1,
|
|
.endianness = 1,
|
|
.non_legacy_dai_naming = 1,
|
|
};
|
|
|
|
const struct regmap_config cs42l51_regmap = {
|
|
.max_register = CS42L51_CHARGE_FREQ,
|
|
.cache_type = REGCACHE_RBTREE,
|
|
};
|
|
EXPORT_SYMBOL_GPL(cs42l51_regmap);
|
|
|
|
int cs42l51_probe(struct device *dev, struct regmap *regmap)
|
|
{
|
|
struct cs42l51_private *cs42l51;
|
|
unsigned int val;
|
|
int ret;
|
|
|
|
if (IS_ERR(regmap))
|
|
return PTR_ERR(regmap);
|
|
|
|
cs42l51 = devm_kzalloc(dev, sizeof(struct cs42l51_private),
|
|
GFP_KERNEL);
|
|
if (!cs42l51)
|
|
return -ENOMEM;
|
|
|
|
dev_set_drvdata(dev, cs42l51);
|
|
|
|
cs42l51->mclk_handle = devm_clk_get(dev, "MCLK");
|
|
if (IS_ERR(cs42l51->mclk_handle)) {
|
|
if (PTR_ERR(cs42l51->mclk_handle) != -ENOENT)
|
|
return PTR_ERR(cs42l51->mclk_handle);
|
|
cs42l51->mclk_handle = NULL;
|
|
}
|
|
|
|
/* Verify that we have a CS42L51 */
|
|
ret = regmap_read(regmap, CS42L51_CHIP_REV_ID, &val);
|
|
if (ret < 0) {
|
|
dev_err(dev, "failed to read I2C\n");
|
|
goto error;
|
|
}
|
|
|
|
if ((val != CS42L51_MK_CHIP_REV(CS42L51_CHIP_ID, CS42L51_CHIP_REV_A)) &&
|
|
(val != CS42L51_MK_CHIP_REV(CS42L51_CHIP_ID, CS42L51_CHIP_REV_B))) {
|
|
dev_err(dev, "Invalid chip id: %x\n", val);
|
|
ret = -ENODEV;
|
|
goto error;
|
|
}
|
|
dev_info(dev, "Cirrus Logic CS42L51, Revision: %02X\n",
|
|
val & CS42L51_CHIP_REV_MASK);
|
|
|
|
ret = devm_snd_soc_register_component(dev,
|
|
&soc_component_device_cs42l51, &cs42l51_dai, 1);
|
|
error:
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL_GPL(cs42l51_probe);
|
|
|
|
const struct of_device_id cs42l51_of_match[] = {
|
|
{ .compatible = "cirrus,cs42l51", },
|
|
{ }
|
|
};
|
|
MODULE_DEVICE_TABLE(of, cs42l51_of_match);
|
|
EXPORT_SYMBOL_GPL(cs42l51_of_match);
|
|
|
|
MODULE_AUTHOR("Arnaud Patard <arnaud.patard@rtp-net.org>");
|
|
MODULE_DESCRIPTION("Cirrus Logic CS42L51 ALSA SoC Codec Driver");
|
|
MODULE_LICENSE("GPL");
|