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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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788437273f
The spi-s3c64xx uses a Samsung proprietary interface for talking to the DMA engine, which does not work with multiplatform kernels. This version of the patch leaves the old code in place, behind an #ifdef. This can be removed in the future, after the s3c64xx platform start supporting the regular dmaengine interface. An earlier version of this patch was tested successfully on exynos5250 by Padma Venkat. The conversion was rather mechanical, since the samsung interface is just a shallow wrapper around the dmaengine interface. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
72 lines
2.2 KiB
C
72 lines
2.2 KiB
C
/* linux/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
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*
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* Copyright (C) 2009 Samsung Electronics Ltd.
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* Jaswinder Singh <jassi.brar@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __S3C64XX_PLAT_SPI_H
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#define __S3C64XX_PLAT_SPI_H
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#include <linux/dmaengine.h>
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struct platform_device;
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/**
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* struct s3c64xx_spi_csinfo - ChipSelect description
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* @fb_delay: Slave specific feedback delay.
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* Refer to FB_CLK_SEL register definition in SPI chapter.
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* @line: Custom 'identity' of the CS line.
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*
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* This is per SPI-Slave Chipselect information.
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* Allocate and initialize one in machine init code and make the
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* spi_board_info.controller_data point to it.
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*/
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struct s3c64xx_spi_csinfo {
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u8 fb_delay;
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unsigned line;
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};
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/**
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* struct s3c64xx_spi_info - SPI Controller defining structure
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* @src_clk_nr: Clock source index for the CLK_CFG[SPI_CLKSEL] field.
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* @num_cs: Number of CS this controller emulates.
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* @cfg_gpio: Configure pins for this SPI controller.
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*/
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struct s3c64xx_spi_info {
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int src_clk_nr;
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int num_cs;
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int (*cfg_gpio)(void);
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dma_filter_fn filter;
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};
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/**
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* s3c64xx_spi_set_platdata - SPI Controller configure callback by the board
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* initialization code.
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* @cfg_gpio: Pointer to gpio setup function.
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* @src_clk_nr: Clock the SPI controller is to use to generate SPI clocks.
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* @num_cs: Number of elements in the 'cs' array.
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*
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* Call this from machine init code for each SPI Controller that
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* has some chips attached to it.
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*/
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extern void s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
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int num_cs);
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extern void s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
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int num_cs);
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extern void s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
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int num_cs);
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/* defined by architecture to configure gpio */
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extern int s3c64xx_spi0_cfg_gpio(void);
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extern int s3c64xx_spi1_cfg_gpio(void);
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extern int s3c64xx_spi2_cfg_gpio(void);
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extern struct s3c64xx_spi_info s3c64xx_spi0_pdata;
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extern struct s3c64xx_spi_info s3c64xx_spi1_pdata;
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extern struct s3c64xx_spi_info s3c64xx_spi2_pdata;
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#endif /* __S3C64XX_PLAT_SPI_H */
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