mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-12 19:46:50 +07:00
f15cbe6f1a
This follows the sparc changes a439fe51a1.
Most of the moving about was done with Sam's directions at:
http://marc.info/?l=linux-sh&m=121724823706062&w=2
with subsequent hacking and fixups entirely my fault.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
36 lines
1.2 KiB
C
36 lines
1.2 KiB
C
/*
|
|
* include/asm-sh/cpu-sh4/sq.h
|
|
*
|
|
* Copyright (C) 2001, 2002, 2003 Paul Mundt
|
|
* Copyright (C) 2001, 2002 M. R. Brown
|
|
*
|
|
* This file is subject to the terms and conditions of the GNU General Public
|
|
* License. See the file "COPYING" in the main directory of this archive
|
|
* for more details.
|
|
*/
|
|
#ifndef __ASM_CPU_SH4_SQ_H
|
|
#define __ASM_CPU_SH4_SQ_H
|
|
|
|
#include <asm/addrspace.h>
|
|
|
|
/*
|
|
* Store queues range from e0000000-e3fffffc, allowing approx. 64MB to be
|
|
* mapped to any physical address space. Since data is written (and aligned)
|
|
* to 32-byte boundaries, we need to be sure that all allocations are aligned.
|
|
*/
|
|
#define SQ_SIZE 32
|
|
#define SQ_ALIGN_MASK (~(SQ_SIZE - 1))
|
|
#define SQ_ALIGN(addr) (((addr)+SQ_SIZE-1) & SQ_ALIGN_MASK)
|
|
|
|
#define SQ_QACR0 (P4SEG_REG_BASE + 0x38)
|
|
#define SQ_QACR1 (P4SEG_REG_BASE + 0x3c)
|
|
#define SQ_ADDRMAX (P4SEG_STORE_QUE + 0x04000000)
|
|
|
|
/* arch/sh/kernel/cpu/sh4/sq.c */
|
|
unsigned long sq_remap(unsigned long phys, unsigned int size,
|
|
const char *name, unsigned long flags);
|
|
void sq_unmap(unsigned long vaddr);
|
|
void sq_flush_range(unsigned long start, unsigned int len);
|
|
|
|
#endif /* __ASM_CPU_SH4_SQ_H */
|