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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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2795343705
The new clock subsystem was merged in linux-3.4 without any users, this now moves the first three platforms over to it: imx, mxs and spear. The series also contains the changes for the clock subsystem itself, since Mike preferred to have it together with the platforms that require these changes, in order to avoid interdependencies and conflicts. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJPuexPAAoJEIwa5zzehBx3YBsP/0nFhXjb5t1PdLfFzGKtcZVB j4zXWXMHQ1fA7wIfEpZF3Nnco6MQkufF5wJPoPdn1+wmkzCn3D6IwNVWVtW4U5i9 VGyShSbgusAAYXUe/9yYj8eN+bbRQSvdN4eWYWU6+rRXShGZ5dZZmp+IPNl54dnW 6F8uCnHX0cnIMCpGqV+41zZgZ/4wL2k9gdqu0LO6pi07o4tGd0Z4gcySgUFAnn1R kofNHueYIP4UgOg8DREoBzVKlpRqMou3S2kSZUfMeb3Q9ryF7UIvaGqIILyi7PKL kWd3nptg0EPavfL21SwXHiGpnDpB/Gj/F70kcPLus5RYujB24C9bvBmc26z68NZx Sz9mbElkkIU5duZsl1nxBWJ8IZ/tSWdtmC2xQMznmV7gHyGgVwr4j47f4Uv5sBvM 14JHDO7mqN6E6FnTFZu/oPAN5pDjgL+TVNK5BU6Wkq0zitrA6eyKDqCvBCqkO6Nn tNzOuyRDzMOwM7HzqXhxqtzJWXylO1Mldc4bM8X4Cocf4pnLna/X6uP6dgE6A+JY azVYx4I/0NdEPerDTzIcEhBDgZeBVROhUQr+kHxc4rf6WzUUbu/wEo1UKXWV66oW 1jb1yAFFWqYjkQuQc2PD4JSx35sFJaoSaoneRtmzBzRDfzSr5KjKj1E0e1skyMFq 7ZVLCqZD0cB9DhmMDkWP =rwFF -----END PGP SIGNATURE----- Merge tag 'clock' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull arm-soc clock driver changes from Olof Johansson: "The new clock subsystem was merged in linux-3.4 without any users, this now moves the first three platforms over to it: imx, mxs and spear. The series also contains the changes for the clock subsystem itself, since Mike preferred to have it together with the platforms that require these changes, in order to avoid interdependencies and conflicts." Fix up trivial conflicts in arch/arm/mach-kirkwood/common.c (code removed in one branch, added OF support in another) and drivers/dma/imx-sdma.c (independent changes next to each other). * tag 'clock' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (97 commits) clk: Fix CLK_SET_RATE_GATE flag validation in clk_set_rate(). clk: Provide dummy clk_unregister() SPEAr: Update defconfigs SPEAr: Add SMI NOR partition info in dts files SPEAr: Switch to common clock framework SPEAr: Call clk_prepare() before calling clk_enable SPEAr: clk: Add General Purpose Timer Synthesizer clock SPEAr: clk: Add Fractional Synthesizer clock SPEAr: clk: Add Auxiliary Synthesizer clock SPEAr: clk: Add VCO-PLL Synthesizer clock SPEAr: Add DT bindings for SPEAr's timer ARM i.MX: remove now unused clock files ARM: i.MX6: implement clocks using common clock framework ARM i.MX35: implement clocks using common clock framework ARM i.MX5: implement clocks using common clock framework ARM: Kirkwood: Replace clock gating ARM: Orion: Audio: Add clk/clkdev support ARM: Orion: PCIE: Add support for clk ARM: Orion: XOR: Add support for clk ARM: Orion: CESA: Add support for clk ...
248 lines
5.4 KiB
C
248 lines
5.4 KiB
C
/*
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* drivers/mtd/nand/orion_nand.c
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*
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* NAND support for Marvell Orion SoC platforms
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*
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* Tzachi Perelstein <tzachi@marvell.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/slab.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/partitions.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <asm/io.h>
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#include <asm/sizes.h>
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#include <mach/hardware.h>
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#include <plat/orion_nand.h>
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static void orion_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
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{
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struct nand_chip *nc = mtd->priv;
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struct orion_nand_data *board = nc->priv;
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u32 offs;
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if (cmd == NAND_CMD_NONE)
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return;
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if (ctrl & NAND_CLE)
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offs = (1 << board->cle);
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else if (ctrl & NAND_ALE)
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offs = (1 << board->ale);
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else
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return;
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if (nc->options & NAND_BUSWIDTH_16)
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offs <<= 1;
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writeb(cmd, nc->IO_ADDR_W + offs);
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}
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static void orion_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
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{
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struct nand_chip *chip = mtd->priv;
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void __iomem *io_base = chip->IO_ADDR_R;
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uint64_t *buf64;
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int i = 0;
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while (len && (unsigned long)buf & 7) {
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*buf++ = readb(io_base);
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len--;
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}
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buf64 = (uint64_t *)buf;
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while (i < len/8) {
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/*
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* Since GCC has no proper constraint (PR 43518)
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* force x variable to r2/r3 registers as ldrd instruction
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* requires first register to be even.
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*/
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register uint64_t x asm ("r2");
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asm volatile ("ldrd\t%0, [%1]" : "=&r" (x) : "r" (io_base));
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buf64[i++] = x;
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}
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i *= 8;
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while (i < len)
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buf[i++] = readb(io_base);
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}
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static int __init orion_nand_probe(struct platform_device *pdev)
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{
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struct mtd_info *mtd;
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struct mtd_part_parser_data ppdata = {};
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struct nand_chip *nc;
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struct orion_nand_data *board;
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struct resource *res;
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struct clk *clk;
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void __iomem *io_base;
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int ret = 0;
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u32 val = 0;
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nc = kzalloc(sizeof(struct nand_chip) + sizeof(struct mtd_info), GFP_KERNEL);
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if (!nc) {
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printk(KERN_ERR "orion_nand: failed to allocate device structure.\n");
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ret = -ENOMEM;
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goto no_res;
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}
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mtd = (struct mtd_info *)(nc + 1);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res) {
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ret = -ENODEV;
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goto no_res;
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}
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io_base = ioremap(res->start, resource_size(res));
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if (!io_base) {
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printk(KERN_ERR "orion_nand: ioremap failed\n");
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ret = -EIO;
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goto no_res;
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}
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if (pdev->dev.of_node) {
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board = devm_kzalloc(&pdev->dev, sizeof(struct orion_nand_data),
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GFP_KERNEL);
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if (!board) {
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printk(KERN_ERR "orion_nand: failed to allocate board structure.\n");
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ret = -ENOMEM;
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goto no_res;
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}
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if (!of_property_read_u32(pdev->dev.of_node, "cle", &val))
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board->cle = (u8)val;
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else
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board->cle = 0;
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if (!of_property_read_u32(pdev->dev.of_node, "ale", &val))
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board->ale = (u8)val;
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else
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board->ale = 1;
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if (!of_property_read_u32(pdev->dev.of_node,
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"bank-width", &val))
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board->width = (u8)val * 8;
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else
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board->width = 8;
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if (!of_property_read_u32(pdev->dev.of_node,
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"chip-delay", &val))
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board->chip_delay = (u8)val;
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} else
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board = pdev->dev.platform_data;
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mtd->priv = nc;
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mtd->owner = THIS_MODULE;
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nc->priv = board;
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nc->IO_ADDR_R = nc->IO_ADDR_W = io_base;
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nc->cmd_ctrl = orion_nand_cmd_ctrl;
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nc->read_buf = orion_nand_read_buf;
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nc->ecc.mode = NAND_ECC_SOFT;
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if (board->chip_delay)
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nc->chip_delay = board->chip_delay;
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WARN(board->width > 16,
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"%d bit bus width out of range",
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board->width);
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if (board->width == 16)
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nc->options |= NAND_BUSWIDTH_16;
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if (board->dev_ready)
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nc->dev_ready = board->dev_ready;
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platform_set_drvdata(pdev, mtd);
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/* Not all platforms can gate the clock, so it is not
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an error if the clock does not exists. */
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clk = clk_get(&pdev->dev, NULL);
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if (!IS_ERR(clk)) {
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clk_prepare_enable(clk);
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clk_put(clk);
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}
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if (nand_scan(mtd, 1)) {
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ret = -ENXIO;
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goto no_dev;
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}
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mtd->name = "orion_nand";
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ppdata.of_node = pdev->dev.of_node;
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ret = mtd_device_parse_register(mtd, NULL, &ppdata,
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board->parts, board->nr_parts);
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if (ret) {
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nand_release(mtd);
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goto no_dev;
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}
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return 0;
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no_dev:
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platform_set_drvdata(pdev, NULL);
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iounmap(io_base);
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no_res:
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kfree(nc);
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return ret;
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}
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static int __devexit orion_nand_remove(struct platform_device *pdev)
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{
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struct mtd_info *mtd = platform_get_drvdata(pdev);
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struct nand_chip *nc = mtd->priv;
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struct clk *clk;
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nand_release(mtd);
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iounmap(nc->IO_ADDR_W);
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kfree(nc);
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clk = clk_get(&pdev->dev, NULL);
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if (!IS_ERR(clk)) {
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clk_disable_unprepare(clk);
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clk_put(clk);
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}
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return 0;
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}
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#ifdef CONFIG_OF
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static struct of_device_id orion_nand_of_match_table[] = {
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{ .compatible = "mrvl,orion-nand", },
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{},
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};
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#endif
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static struct platform_driver orion_nand_driver = {
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.remove = __devexit_p(orion_nand_remove),
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.driver = {
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.name = "orion_nand",
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.owner = THIS_MODULE,
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.of_match_table = of_match_ptr(orion_nand_of_match_table),
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},
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};
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static int __init orion_nand_init(void)
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{
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return platform_driver_probe(&orion_nand_driver, orion_nand_probe);
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}
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static void __exit orion_nand_exit(void)
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{
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platform_driver_unregister(&orion_nand_driver);
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}
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module_init(orion_nand_init);
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module_exit(orion_nand_exit);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Tzachi Perelstein");
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MODULE_DESCRIPTION("NAND glue for Orion platforms");
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MODULE_ALIAS("platform:orion_nand");
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