mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-25 18:50:55 +07:00
698c0f7ff2
Reverts commit 847b19a39e
("dma-buf/fence: don't wait when specified timeout is zero")
When we don't call the wait function software signaling might never be
activated. This can cause infinite polling loops with unreliable interrupt
driven hardware.
v2: rebase on drm-next
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sumit Semwal <sumit.semwal@linaro.org>
[sumits: reword commit msg for checkpatch warnings]
Link: http://patchwork.freedesktop.org/patch/msgid/1478553376-18575-2-git-send-email-alexander.deucher@amd.com
548 lines
15 KiB
C
548 lines
15 KiB
C
/*
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* Fence mechanism for dma-buf and to allow for asynchronous dma access
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*
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* Copyright (C) 2012 Canonical Ltd
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* Copyright (C) 2012 Texas Instruments
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*
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* Authors:
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* Rob Clark <robdclark@gmail.com>
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* Maarten Lankhorst <maarten.lankhorst@canonical.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include <linux/slab.h>
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#include <linux/export.h>
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#include <linux/atomic.h>
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#include <linux/dma-fence.h>
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#define CREATE_TRACE_POINTS
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#include <trace/events/dma_fence.h>
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EXPORT_TRACEPOINT_SYMBOL(dma_fence_annotate_wait_on);
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EXPORT_TRACEPOINT_SYMBOL(dma_fence_emit);
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/*
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* fence context counter: each execution context should have its own
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* fence context, this allows checking if fences belong to the same
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* context or not. One device can have multiple separate contexts,
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* and they're used if some engine can run independently of another.
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*/
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static atomic64_t dma_fence_context_counter = ATOMIC64_INIT(0);
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/**
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* dma_fence_context_alloc - allocate an array of fence contexts
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* @num: [in] amount of contexts to allocate
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*
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* This function will return the first index of the number of fences allocated.
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* The fence context is used for setting fence->context to a unique number.
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*/
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u64 dma_fence_context_alloc(unsigned num)
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{
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BUG_ON(!num);
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return atomic64_add_return(num, &dma_fence_context_counter) - num;
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}
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EXPORT_SYMBOL(dma_fence_context_alloc);
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/**
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* dma_fence_signal_locked - signal completion of a fence
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* @fence: the fence to signal
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*
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* Signal completion for software callbacks on a fence, this will unblock
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* dma_fence_wait() calls and run all the callbacks added with
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* dma_fence_add_callback(). Can be called multiple times, but since a fence
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* can only go from unsignaled to signaled state, it will only be effective
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* the first time.
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*
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* Unlike dma_fence_signal, this function must be called with fence->lock held.
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*/
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int dma_fence_signal_locked(struct dma_fence *fence)
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{
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struct dma_fence_cb *cur, *tmp;
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int ret = 0;
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lockdep_assert_held(fence->lock);
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if (WARN_ON(!fence))
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return -EINVAL;
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if (!ktime_to_ns(fence->timestamp)) {
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fence->timestamp = ktime_get();
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smp_mb__before_atomic();
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}
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if (test_and_set_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) {
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ret = -EINVAL;
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/*
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* we might have raced with the unlocked dma_fence_signal,
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* still run through all callbacks
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*/
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} else
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trace_dma_fence_signaled(fence);
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list_for_each_entry_safe(cur, tmp, &fence->cb_list, node) {
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list_del_init(&cur->node);
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cur->func(fence, cur);
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}
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return ret;
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}
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EXPORT_SYMBOL(dma_fence_signal_locked);
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/**
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* dma_fence_signal - signal completion of a fence
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* @fence: the fence to signal
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*
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* Signal completion for software callbacks on a fence, this will unblock
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* dma_fence_wait() calls and run all the callbacks added with
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* dma_fence_add_callback(). Can be called multiple times, but since a fence
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* can only go from unsignaled to signaled state, it will only be effective
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* the first time.
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*/
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int dma_fence_signal(struct dma_fence *fence)
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{
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unsigned long flags;
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if (!fence)
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return -EINVAL;
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if (!ktime_to_ns(fence->timestamp)) {
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fence->timestamp = ktime_get();
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smp_mb__before_atomic();
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}
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if (test_and_set_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))
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return -EINVAL;
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trace_dma_fence_signaled(fence);
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if (test_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, &fence->flags)) {
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struct dma_fence_cb *cur, *tmp;
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spin_lock_irqsave(fence->lock, flags);
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list_for_each_entry_safe(cur, tmp, &fence->cb_list, node) {
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list_del_init(&cur->node);
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cur->func(fence, cur);
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}
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spin_unlock_irqrestore(fence->lock, flags);
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}
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return 0;
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}
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EXPORT_SYMBOL(dma_fence_signal);
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/**
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* dma_fence_wait_timeout - sleep until the fence gets signaled
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* or until timeout elapses
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* @fence: [in] the fence to wait on
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* @intr: [in] if true, do an interruptible wait
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* @timeout: [in] timeout value in jiffies, or MAX_SCHEDULE_TIMEOUT
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*
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* Returns -ERESTARTSYS if interrupted, 0 if the wait timed out, or the
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* remaining timeout in jiffies on success. Other error values may be
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* returned on custom implementations.
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*
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* Performs a synchronous wait on this fence. It is assumed the caller
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* directly or indirectly (buf-mgr between reservation and committing)
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* holds a reference to the fence, otherwise the fence might be
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* freed before return, resulting in undefined behavior.
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*/
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signed long
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dma_fence_wait_timeout(struct dma_fence *fence, bool intr, signed long timeout)
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{
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signed long ret;
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if (WARN_ON(timeout < 0))
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return -EINVAL;
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trace_dma_fence_wait_start(fence);
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ret = fence->ops->wait(fence, intr, timeout);
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trace_dma_fence_wait_end(fence);
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return ret;
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}
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EXPORT_SYMBOL(dma_fence_wait_timeout);
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void dma_fence_release(struct kref *kref)
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{
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struct dma_fence *fence =
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container_of(kref, struct dma_fence, refcount);
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trace_dma_fence_destroy(fence);
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BUG_ON(!list_empty(&fence->cb_list));
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if (fence->ops->release)
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fence->ops->release(fence);
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else
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dma_fence_free(fence);
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}
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EXPORT_SYMBOL(dma_fence_release);
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void dma_fence_free(struct dma_fence *fence)
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{
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kfree_rcu(fence, rcu);
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}
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EXPORT_SYMBOL(dma_fence_free);
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/**
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* dma_fence_enable_sw_signaling - enable signaling on fence
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* @fence: [in] the fence to enable
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*
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* this will request for sw signaling to be enabled, to make the fence
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* complete as soon as possible
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*/
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void dma_fence_enable_sw_signaling(struct dma_fence *fence)
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{
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unsigned long flags;
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if (!test_and_set_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT,
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&fence->flags) &&
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!test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) {
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trace_dma_fence_enable_signal(fence);
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spin_lock_irqsave(fence->lock, flags);
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if (!fence->ops->enable_signaling(fence))
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dma_fence_signal_locked(fence);
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spin_unlock_irqrestore(fence->lock, flags);
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}
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}
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EXPORT_SYMBOL(dma_fence_enable_sw_signaling);
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/**
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* dma_fence_add_callback - add a callback to be called when the fence
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* is signaled
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* @fence: [in] the fence to wait on
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* @cb: [in] the callback to register
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* @func: [in] the function to call
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*
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* cb will be initialized by dma_fence_add_callback, no initialization
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* by the caller is required. Any number of callbacks can be registered
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* to a fence, but a callback can only be registered to one fence at a time.
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*
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* Note that the callback can be called from an atomic context. If
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* fence is already signaled, this function will return -ENOENT (and
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* *not* call the callback)
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*
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* Add a software callback to the fence. Same restrictions apply to
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* refcount as it does to dma_fence_wait, however the caller doesn't need to
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* keep a refcount to fence afterwards: when software access is enabled,
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* the creator of the fence is required to keep the fence alive until
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* after it signals with dma_fence_signal. The callback itself can be called
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* from irq context.
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*
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*/
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int dma_fence_add_callback(struct dma_fence *fence, struct dma_fence_cb *cb,
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dma_fence_func_t func)
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{
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unsigned long flags;
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int ret = 0;
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bool was_set;
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if (WARN_ON(!fence || !func))
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return -EINVAL;
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if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) {
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INIT_LIST_HEAD(&cb->node);
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return -ENOENT;
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}
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spin_lock_irqsave(fence->lock, flags);
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was_set = test_and_set_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT,
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&fence->flags);
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if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))
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ret = -ENOENT;
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else if (!was_set) {
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trace_dma_fence_enable_signal(fence);
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if (!fence->ops->enable_signaling(fence)) {
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dma_fence_signal_locked(fence);
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ret = -ENOENT;
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}
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}
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if (!ret) {
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cb->func = func;
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list_add_tail(&cb->node, &fence->cb_list);
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} else
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INIT_LIST_HEAD(&cb->node);
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spin_unlock_irqrestore(fence->lock, flags);
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return ret;
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}
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EXPORT_SYMBOL(dma_fence_add_callback);
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/**
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* dma_fence_remove_callback - remove a callback from the signaling list
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* @fence: [in] the fence to wait on
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* @cb: [in] the callback to remove
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*
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* Remove a previously queued callback from the fence. This function returns
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* true if the callback is successfully removed, or false if the fence has
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* already been signaled.
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*
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* *WARNING*:
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* Cancelling a callback should only be done if you really know what you're
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* doing, since deadlocks and race conditions could occur all too easily. For
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* this reason, it should only ever be done on hardware lockup recovery,
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* with a reference held to the fence.
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*/
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bool
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dma_fence_remove_callback(struct dma_fence *fence, struct dma_fence_cb *cb)
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{
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unsigned long flags;
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bool ret;
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spin_lock_irqsave(fence->lock, flags);
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ret = !list_empty(&cb->node);
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if (ret)
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list_del_init(&cb->node);
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spin_unlock_irqrestore(fence->lock, flags);
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return ret;
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}
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EXPORT_SYMBOL(dma_fence_remove_callback);
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struct default_wait_cb {
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struct dma_fence_cb base;
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struct task_struct *task;
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};
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static void
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dma_fence_default_wait_cb(struct dma_fence *fence, struct dma_fence_cb *cb)
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{
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struct default_wait_cb *wait =
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container_of(cb, struct default_wait_cb, base);
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wake_up_state(wait->task, TASK_NORMAL);
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}
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/**
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* dma_fence_default_wait - default sleep until the fence gets signaled
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* or until timeout elapses
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* @fence: [in] the fence to wait on
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* @intr: [in] if true, do an interruptible wait
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* @timeout: [in] timeout value in jiffies, or MAX_SCHEDULE_TIMEOUT
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*
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* Returns -ERESTARTSYS if interrupted, 0 if the wait timed out, or the
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* remaining timeout in jiffies on success. If timeout is zero the value one is
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* returned if the fence is already signaled for consistency with other
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* functions taking a jiffies timeout.
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*/
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signed long
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dma_fence_default_wait(struct dma_fence *fence, bool intr, signed long timeout)
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{
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struct default_wait_cb cb;
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unsigned long flags;
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signed long ret = timeout ? timeout : 1;
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bool was_set;
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if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))
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return ret;
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spin_lock_irqsave(fence->lock, flags);
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if (intr && signal_pending(current)) {
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ret = -ERESTARTSYS;
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goto out;
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}
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was_set = test_and_set_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT,
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&fence->flags);
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if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))
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goto out;
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if (!was_set) {
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trace_dma_fence_enable_signal(fence);
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if (!fence->ops->enable_signaling(fence)) {
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dma_fence_signal_locked(fence);
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goto out;
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}
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}
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cb.base.func = dma_fence_default_wait_cb;
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cb.task = current;
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list_add(&cb.base.node, &fence->cb_list);
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while (!test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags) && ret > 0) {
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if (intr)
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__set_current_state(TASK_INTERRUPTIBLE);
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else
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__set_current_state(TASK_UNINTERRUPTIBLE);
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spin_unlock_irqrestore(fence->lock, flags);
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ret = schedule_timeout(ret);
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spin_lock_irqsave(fence->lock, flags);
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if (ret > 0 && intr && signal_pending(current))
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ret = -ERESTARTSYS;
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}
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if (!list_empty(&cb.base.node))
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list_del(&cb.base.node);
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__set_current_state(TASK_RUNNING);
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out:
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spin_unlock_irqrestore(fence->lock, flags);
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return ret;
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}
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EXPORT_SYMBOL(dma_fence_default_wait);
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static bool
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dma_fence_test_signaled_any(struct dma_fence **fences, uint32_t count,
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uint32_t *idx)
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{
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int i;
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for (i = 0; i < count; ++i) {
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struct dma_fence *fence = fences[i];
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if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) {
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if (idx)
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*idx = i;
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return true;
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}
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}
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return false;
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}
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/**
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* dma_fence_wait_any_timeout - sleep until any fence gets signaled
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* or until timeout elapses
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* @fences: [in] array of fences to wait on
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* @count: [in] number of fences to wait on
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* @intr: [in] if true, do an interruptible wait
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* @timeout: [in] timeout value in jiffies, or MAX_SCHEDULE_TIMEOUT
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* @idx: [out] the first signaled fence index, meaningful only on
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* positive return
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*
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* Returns -EINVAL on custom fence wait implementation, -ERESTARTSYS if
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* interrupted, 0 if the wait timed out, or the remaining timeout in jiffies
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* on success.
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*
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* Synchronous waits for the first fence in the array to be signaled. The
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* caller needs to hold a reference to all fences in the array, otherwise a
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* fence might be freed before return, resulting in undefined behavior.
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*/
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signed long
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dma_fence_wait_any_timeout(struct dma_fence **fences, uint32_t count,
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bool intr, signed long timeout, uint32_t *idx)
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{
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struct default_wait_cb *cb;
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signed long ret = timeout;
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unsigned i;
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if (WARN_ON(!fences || !count || timeout < 0))
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return -EINVAL;
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if (timeout == 0) {
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for (i = 0; i < count; ++i)
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if (dma_fence_is_signaled(fences[i])) {
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if (idx)
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*idx = i;
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return 1;
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}
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return 0;
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}
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cb = kcalloc(count, sizeof(struct default_wait_cb), GFP_KERNEL);
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if (cb == NULL) {
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ret = -ENOMEM;
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goto err_free_cb;
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}
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for (i = 0; i < count; ++i) {
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struct dma_fence *fence = fences[i];
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if (fence->ops->wait != dma_fence_default_wait) {
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ret = -EINVAL;
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goto fence_rm_cb;
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}
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cb[i].task = current;
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if (dma_fence_add_callback(fence, &cb[i].base,
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dma_fence_default_wait_cb)) {
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/* This fence is already signaled */
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if (idx)
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*idx = i;
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goto fence_rm_cb;
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}
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}
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while (ret > 0) {
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if (intr)
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set_current_state(TASK_INTERRUPTIBLE);
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else
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set_current_state(TASK_UNINTERRUPTIBLE);
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if (dma_fence_test_signaled_any(fences, count, idx))
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break;
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ret = schedule_timeout(ret);
|
|
|
|
if (ret > 0 && intr && signal_pending(current))
|
|
ret = -ERESTARTSYS;
|
|
}
|
|
|
|
__set_current_state(TASK_RUNNING);
|
|
|
|
fence_rm_cb:
|
|
while (i-- > 0)
|
|
dma_fence_remove_callback(fences[i], &cb[i].base);
|
|
|
|
err_free_cb:
|
|
kfree(cb);
|
|
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL(dma_fence_wait_any_timeout);
|
|
|
|
/**
|
|
* dma_fence_init - Initialize a custom fence.
|
|
* @fence: [in] the fence to initialize
|
|
* @ops: [in] the dma_fence_ops for operations on this fence
|
|
* @lock: [in] the irqsafe spinlock to use for locking this fence
|
|
* @context: [in] the execution context this fence is run on
|
|
* @seqno: [in] a linear increasing sequence number for this context
|
|
*
|
|
* Initializes an allocated fence, the caller doesn't have to keep its
|
|
* refcount after committing with this fence, but it will need to hold a
|
|
* refcount again if dma_fence_ops.enable_signaling gets called. This can
|
|
* be used for other implementing other types of fence.
|
|
*
|
|
* context and seqno are used for easy comparison between fences, allowing
|
|
* to check which fence is later by simply using dma_fence_later.
|
|
*/
|
|
void
|
|
dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops,
|
|
spinlock_t *lock, u64 context, unsigned seqno)
|
|
{
|
|
BUG_ON(!lock);
|
|
BUG_ON(!ops || !ops->wait || !ops->enable_signaling ||
|
|
!ops->get_driver_name || !ops->get_timeline_name);
|
|
|
|
kref_init(&fence->refcount);
|
|
fence->ops = ops;
|
|
INIT_LIST_HEAD(&fence->cb_list);
|
|
fence->lock = lock;
|
|
fence->context = context;
|
|
fence->seqno = seqno;
|
|
fence->flags = 0UL;
|
|
|
|
trace_dma_fence_init(fence);
|
|
}
|
|
EXPORT_SYMBOL(dma_fence_init);
|