Chanwoo Choi 304d10abb6 ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos3250 ... This patch adds the bus nodes using VDD_INT for Exynos3250 SoC. Exynos3250 has following AXI buses to translate data between DRAM and sub-blocks. Following list specifies the detailed relation between DRAM and sub-blocks: - ACLK400 clock for MCUISP - ACLK266 clock for ISP - ACLK200 clock for FSYS - ACLK160 clock for LCD0 - ACLK100 clock for PERIL - GDL clock for LEFTBUS - GDR clock for RIGHTBUS - SCLK_MFC clock for MFC Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>		2016-05-03 12:22:57 +02:00
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bootp
compressed	Merge branch 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm	2016-03-19 16:31:54 -07:00
dts	ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos3250	2016-05-03 12:22:57 +02:00
.gitignore
install.sh
Makefile	ARM: 8529/1: remove 'i' and 'zi' targets	2016-02-16 16:33:41 +00:00