mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-14 16:26:46 +07:00
304bceda6a
Fundamental model of the current Linux kernel is to lazily init and restore FPU instead of restoring the task state during context switch. This changes that fundamental lazy model to the non-lazy model for the processors supporting xsave feature. Reasons driving this model change are: i. Newer processors support optimized state save/restore using xsaveopt and xrstor by tracking the INIT state and MODIFIED state during context-switch. This is faster than modifying the cr0.TS bit which has serializing semantics. ii. Newer glibc versions use SSE for some of the optimized copy/clear routines. With certain workloads (like boot, kernel-compilation etc), application completes its work with in the first 5 task switches, thus taking upto 5 #DNA traps with the kernel not getting a chance to apply the above mentioned pre-load heuristic. iii. Some xstate features (like AMD's LWP feature) don't honor the cr0.TS bit and thus will not work correctly in the presence of lazy restore. Non-lazy state restore is needed for enabling such features. Some data on a two socket SNB system: * Saved 20K DNA exceptions during boot on a two socket SNB system. * Saved 50K DNA exceptions during kernel-compilation workload. * Improved throughput of the AVX based checksumming function inside the kernel by ~15% as xsave/xrstor is faster than the serializing clts/stts pair. Also now kernel_fpu_begin/end() relies on the patched alternative instructions. So move check_fpu() which uses the kernel_fpu_begin/end() after alternative_instructions(). Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Link: http://lkml.kernel.org/r/1345842782-24175-7-git-send-email-suresh.b.siddha@intel.com Merge 32-bit boot fix from, Link: http://lkml.kernel.org/r/1347300665-6209-4-git-send-email-suresh.b.siddha@intel.com Cc: Jim Kukunas <james.t.kukunas@linux.intel.com> Cc: NeilBrown <neilb@suse.de> Cc: Avi Kivity <avi@redhat.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
544 lines
13 KiB
C
544 lines
13 KiB
C
/*
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* Copyright (C) 1995 Linus Torvalds
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*
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* Pentium III FXSR, SSE support
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* Gareth Hughes <gareth@valinux.com>, May 2000
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*
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* X86-64 port
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* Andi Kleen.
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*
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* CPU hotplug support - ashok.raj@intel.com
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*/
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/*
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* This file handles the architecture-dependent parts of process handling..
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*/
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#include <linux/cpu.h>
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/fs.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/elfcore.h>
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#include <linux/smp.h>
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#include <linux/slab.h>
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#include <linux/user.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/module.h>
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#include <linux/ptrace.h>
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#include <linux/notifier.h>
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#include <linux/kprobes.h>
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#include <linux/kdebug.h>
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#include <linux/prctl.h>
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#include <linux/uaccess.h>
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#include <linux/io.h>
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#include <linux/ftrace.h>
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#include <asm/pgtable.h>
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#include <asm/processor.h>
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#include <asm/i387.h>
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#include <asm/fpu-internal.h>
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#include <asm/mmu_context.h>
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#include <asm/prctl.h>
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#include <asm/desc.h>
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#include <asm/proto.h>
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#include <asm/ia32.h>
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#include <asm/idle.h>
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#include <asm/syscalls.h>
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#include <asm/debugreg.h>
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#include <asm/switch_to.h>
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asmlinkage extern void ret_from_fork(void);
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DEFINE_PER_CPU(unsigned long, old_rsp);
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/* Prints also some state that isn't saved in the pt_regs */
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void __show_regs(struct pt_regs *regs, int all)
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{
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unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L, fs, gs, shadowgs;
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unsigned long d0, d1, d2, d3, d6, d7;
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unsigned int fsindex, gsindex;
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unsigned int ds, cs, es;
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show_regs_common();
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printk(KERN_DEFAULT "RIP: %04lx:[<%016lx>] ", regs->cs & 0xffff, regs->ip);
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printk_address(regs->ip, 1);
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printk(KERN_DEFAULT "RSP: %04lx:%016lx EFLAGS: %08lx\n", regs->ss,
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regs->sp, regs->flags);
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printk(KERN_DEFAULT "RAX: %016lx RBX: %016lx RCX: %016lx\n",
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regs->ax, regs->bx, regs->cx);
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printk(KERN_DEFAULT "RDX: %016lx RSI: %016lx RDI: %016lx\n",
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regs->dx, regs->si, regs->di);
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printk(KERN_DEFAULT "RBP: %016lx R08: %016lx R09: %016lx\n",
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regs->bp, regs->r8, regs->r9);
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printk(KERN_DEFAULT "R10: %016lx R11: %016lx R12: %016lx\n",
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regs->r10, regs->r11, regs->r12);
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printk(KERN_DEFAULT "R13: %016lx R14: %016lx R15: %016lx\n",
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regs->r13, regs->r14, regs->r15);
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asm("movl %%ds,%0" : "=r" (ds));
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asm("movl %%cs,%0" : "=r" (cs));
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asm("movl %%es,%0" : "=r" (es));
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asm("movl %%fs,%0" : "=r" (fsindex));
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asm("movl %%gs,%0" : "=r" (gsindex));
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rdmsrl(MSR_FS_BASE, fs);
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rdmsrl(MSR_GS_BASE, gs);
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rdmsrl(MSR_KERNEL_GS_BASE, shadowgs);
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if (!all)
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return;
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cr0 = read_cr0();
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cr2 = read_cr2();
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cr3 = read_cr3();
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cr4 = read_cr4();
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printk(KERN_DEFAULT "FS: %016lx(%04x) GS:%016lx(%04x) knlGS:%016lx\n",
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fs, fsindex, gs, gsindex, shadowgs);
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printk(KERN_DEFAULT "CS: %04x DS: %04x ES: %04x CR0: %016lx\n", cs, ds,
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es, cr0);
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printk(KERN_DEFAULT "CR2: %016lx CR3: %016lx CR4: %016lx\n", cr2, cr3,
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cr4);
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get_debugreg(d0, 0);
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get_debugreg(d1, 1);
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get_debugreg(d2, 2);
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printk(KERN_DEFAULT "DR0: %016lx DR1: %016lx DR2: %016lx\n", d0, d1, d2);
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get_debugreg(d3, 3);
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get_debugreg(d6, 6);
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get_debugreg(d7, 7);
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printk(KERN_DEFAULT "DR3: %016lx DR6: %016lx DR7: %016lx\n", d3, d6, d7);
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}
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void release_thread(struct task_struct *dead_task)
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{
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if (dead_task->mm) {
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if (dead_task->mm->context.size) {
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pr_warn("WARNING: dead process %8s still has LDT? <%p/%d>\n",
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dead_task->comm,
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dead_task->mm->context.ldt,
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dead_task->mm->context.size);
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BUG();
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}
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}
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}
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static inline void set_32bit_tls(struct task_struct *t, int tls, u32 addr)
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{
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struct user_desc ud = {
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.base_addr = addr,
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.limit = 0xfffff,
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.seg_32bit = 1,
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.limit_in_pages = 1,
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.useable = 1,
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};
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struct desc_struct *desc = t->thread.tls_array;
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desc += tls;
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fill_ldt(desc, &ud);
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}
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static inline u32 read_32bit_tls(struct task_struct *t, int tls)
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{
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return get_desc_base(&t->thread.tls_array[tls]);
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}
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int copy_thread(unsigned long clone_flags, unsigned long sp,
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unsigned long unused,
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struct task_struct *p, struct pt_regs *regs)
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{
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int err;
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struct pt_regs *childregs;
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struct task_struct *me = current;
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childregs = ((struct pt_regs *)
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(THREAD_SIZE + task_stack_page(p))) - 1;
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*childregs = *regs;
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childregs->ax = 0;
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if (user_mode(regs))
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childregs->sp = sp;
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else
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childregs->sp = (unsigned long)childregs;
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p->thread.sp = (unsigned long) childregs;
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p->thread.sp0 = (unsigned long) (childregs+1);
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p->thread.usersp = me->thread.usersp;
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set_tsk_thread_flag(p, TIF_FORK);
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p->fpu_counter = 0;
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p->thread.io_bitmap_ptr = NULL;
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savesegment(gs, p->thread.gsindex);
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p->thread.gs = p->thread.gsindex ? 0 : me->thread.gs;
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savesegment(fs, p->thread.fsindex);
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p->thread.fs = p->thread.fsindex ? 0 : me->thread.fs;
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savesegment(es, p->thread.es);
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savesegment(ds, p->thread.ds);
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err = -ENOMEM;
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memset(p->thread.ptrace_bps, 0, sizeof(p->thread.ptrace_bps));
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if (unlikely(test_tsk_thread_flag(me, TIF_IO_BITMAP))) {
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p->thread.io_bitmap_ptr = kmemdup(me->thread.io_bitmap_ptr,
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IO_BITMAP_BYTES, GFP_KERNEL);
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if (!p->thread.io_bitmap_ptr) {
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p->thread.io_bitmap_max = 0;
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return -ENOMEM;
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}
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set_tsk_thread_flag(p, TIF_IO_BITMAP);
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}
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/*
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* Set a new TLS for the child thread?
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*/
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if (clone_flags & CLONE_SETTLS) {
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#ifdef CONFIG_IA32_EMULATION
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if (test_thread_flag(TIF_IA32))
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err = do_set_thread_area(p, -1,
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(struct user_desc __user *)childregs->si, 0);
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else
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#endif
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err = do_arch_prctl(p, ARCH_SET_FS, childregs->r8);
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if (err)
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goto out;
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}
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err = 0;
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out:
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if (err && p->thread.io_bitmap_ptr) {
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kfree(p->thread.io_bitmap_ptr);
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p->thread.io_bitmap_max = 0;
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}
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return err;
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}
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static void
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start_thread_common(struct pt_regs *regs, unsigned long new_ip,
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unsigned long new_sp,
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unsigned int _cs, unsigned int _ss, unsigned int _ds)
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{
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loadsegment(fs, 0);
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loadsegment(es, _ds);
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loadsegment(ds, _ds);
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load_gs_index(0);
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current->thread.usersp = new_sp;
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regs->ip = new_ip;
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regs->sp = new_sp;
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this_cpu_write(old_rsp, new_sp);
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regs->cs = _cs;
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regs->ss = _ss;
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regs->flags = X86_EFLAGS_IF;
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}
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void
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start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp)
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{
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start_thread_common(regs, new_ip, new_sp,
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__USER_CS, __USER_DS, 0);
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}
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#ifdef CONFIG_IA32_EMULATION
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void start_thread_ia32(struct pt_regs *regs, u32 new_ip, u32 new_sp)
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{
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start_thread_common(regs, new_ip, new_sp,
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test_thread_flag(TIF_X32)
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? __USER_CS : __USER32_CS,
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__USER_DS, __USER_DS);
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}
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#endif
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/*
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* switch_to(x,y) should switch tasks from x to y.
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*
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* This could still be optimized:
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* - fold all the options into a flag word and test it with a single test.
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* - could test fs/gs bitsliced
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*
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* Kprobes not supported here. Set the probe on schedule instead.
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* Function graph tracer not supported too.
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*/
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__notrace_funcgraph struct task_struct *
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__switch_to(struct task_struct *prev_p, struct task_struct *next_p)
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{
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struct thread_struct *prev = &prev_p->thread;
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struct thread_struct *next = &next_p->thread;
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int cpu = smp_processor_id();
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struct tss_struct *tss = &per_cpu(init_tss, cpu);
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unsigned fsindex, gsindex;
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fpu_switch_t fpu;
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fpu = switch_fpu_prepare(prev_p, next_p, cpu);
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/*
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* Reload esp0, LDT and the page table pointer:
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*/
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load_sp0(tss, next);
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/*
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* Switch DS and ES.
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* This won't pick up thread selector changes, but I guess that is ok.
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*/
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savesegment(es, prev->es);
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if (unlikely(next->es | prev->es))
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loadsegment(es, next->es);
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savesegment(ds, prev->ds);
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if (unlikely(next->ds | prev->ds))
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loadsegment(ds, next->ds);
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/* We must save %fs and %gs before load_TLS() because
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* %fs and %gs may be cleared by load_TLS().
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*
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* (e.g. xen_load_tls())
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*/
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savesegment(fs, fsindex);
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savesegment(gs, gsindex);
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load_TLS(next, cpu);
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/*
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* Leave lazy mode, flushing any hypercalls made here.
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* This must be done before restoring TLS segments so
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* the GDT and LDT are properly updated, and must be
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* done before math_state_restore, so the TS bit is up
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* to date.
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*/
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arch_end_context_switch(next_p);
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/*
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* Switch FS and GS.
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*
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* Segment register != 0 always requires a reload. Also
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* reload when it has changed. When prev process used 64bit
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* base always reload to avoid an information leak.
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*/
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if (unlikely(fsindex | next->fsindex | prev->fs)) {
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loadsegment(fs, next->fsindex);
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/*
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* Check if the user used a selector != 0; if yes
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* clear 64bit base, since overloaded base is always
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* mapped to the Null selector
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*/
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if (fsindex)
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prev->fs = 0;
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}
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/* when next process has a 64bit base use it */
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if (next->fs)
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wrmsrl(MSR_FS_BASE, next->fs);
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prev->fsindex = fsindex;
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if (unlikely(gsindex | next->gsindex | prev->gs)) {
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load_gs_index(next->gsindex);
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if (gsindex)
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prev->gs = 0;
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}
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if (next->gs)
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wrmsrl(MSR_KERNEL_GS_BASE, next->gs);
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prev->gsindex = gsindex;
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switch_fpu_finish(next_p, fpu);
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/*
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* Switch the PDA and FPU contexts.
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*/
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prev->usersp = this_cpu_read(old_rsp);
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this_cpu_write(old_rsp, next->usersp);
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this_cpu_write(current_task, next_p);
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this_cpu_write(kernel_stack,
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(unsigned long)task_stack_page(next_p) +
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THREAD_SIZE - KERNEL_STACK_OFFSET);
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/*
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* Now maybe reload the debug registers and handle I/O bitmaps
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*/
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if (unlikely(task_thread_info(next_p)->flags & _TIF_WORK_CTXSW_NEXT ||
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task_thread_info(prev_p)->flags & _TIF_WORK_CTXSW_PREV))
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__switch_to_xtra(prev_p, next_p, tss);
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return prev_p;
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}
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void set_personality_64bit(void)
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{
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/* inherit personality from parent */
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/* Make sure to be in 64bit mode */
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clear_thread_flag(TIF_IA32);
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clear_thread_flag(TIF_ADDR32);
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clear_thread_flag(TIF_X32);
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/* Ensure the corresponding mm is not marked. */
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if (current->mm)
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current->mm->context.ia32_compat = 0;
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/* TBD: overwrites user setup. Should have two bits.
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But 64bit processes have always behaved this way,
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so it's not too bad. The main problem is just that
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32bit childs are affected again. */
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current->personality &= ~READ_IMPLIES_EXEC;
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}
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void set_personality_ia32(bool x32)
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{
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/* inherit personality from parent */
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/* Make sure to be in 32bit mode */
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set_thread_flag(TIF_ADDR32);
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/* Mark the associated mm as containing 32-bit tasks. */
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if (current->mm)
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current->mm->context.ia32_compat = 1;
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if (x32) {
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clear_thread_flag(TIF_IA32);
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set_thread_flag(TIF_X32);
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current->personality &= ~READ_IMPLIES_EXEC;
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/* is_compat_task() uses the presence of the x32
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syscall bit flag to determine compat status */
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current_thread_info()->status &= ~TS_COMPAT;
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} else {
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set_thread_flag(TIF_IA32);
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clear_thread_flag(TIF_X32);
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current->personality |= force_personality32;
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/* Prepare the first "return" to user space */
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current_thread_info()->status |= TS_COMPAT;
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}
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}
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EXPORT_SYMBOL_GPL(set_personality_ia32);
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unsigned long get_wchan(struct task_struct *p)
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{
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unsigned long stack;
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u64 fp, ip;
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int count = 0;
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if (!p || p == current || p->state == TASK_RUNNING)
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return 0;
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stack = (unsigned long)task_stack_page(p);
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if (p->thread.sp < stack || p->thread.sp >= stack+THREAD_SIZE)
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return 0;
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fp = *(u64 *)(p->thread.sp);
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do {
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if (fp < (unsigned long)stack ||
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fp >= (unsigned long)stack+THREAD_SIZE)
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return 0;
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ip = *(u64 *)(fp+8);
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if (!in_sched_functions(ip))
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return ip;
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fp = *(u64 *)fp;
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} while (count++ < 16);
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return 0;
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}
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long do_arch_prctl(struct task_struct *task, int code, unsigned long addr)
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{
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int ret = 0;
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int doit = task == current;
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int cpu;
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switch (code) {
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case ARCH_SET_GS:
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if (addr >= TASK_SIZE_OF(task))
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return -EPERM;
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cpu = get_cpu();
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/* handle small bases via the GDT because that's faster to
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switch. */
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if (addr <= 0xffffffff) {
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set_32bit_tls(task, GS_TLS, addr);
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if (doit) {
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load_TLS(&task->thread, cpu);
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load_gs_index(GS_TLS_SEL);
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}
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task->thread.gsindex = GS_TLS_SEL;
|
|
task->thread.gs = 0;
|
|
} else {
|
|
task->thread.gsindex = 0;
|
|
task->thread.gs = addr;
|
|
if (doit) {
|
|
load_gs_index(0);
|
|
ret = wrmsrl_safe(MSR_KERNEL_GS_BASE, addr);
|
|
}
|
|
}
|
|
put_cpu();
|
|
break;
|
|
case ARCH_SET_FS:
|
|
/* Not strictly needed for fs, but do it for symmetry
|
|
with gs */
|
|
if (addr >= TASK_SIZE_OF(task))
|
|
return -EPERM;
|
|
cpu = get_cpu();
|
|
/* handle small bases via the GDT because that's faster to
|
|
switch. */
|
|
if (addr <= 0xffffffff) {
|
|
set_32bit_tls(task, FS_TLS, addr);
|
|
if (doit) {
|
|
load_TLS(&task->thread, cpu);
|
|
loadsegment(fs, FS_TLS_SEL);
|
|
}
|
|
task->thread.fsindex = FS_TLS_SEL;
|
|
task->thread.fs = 0;
|
|
} else {
|
|
task->thread.fsindex = 0;
|
|
task->thread.fs = addr;
|
|
if (doit) {
|
|
/* set the selector to 0 to not confuse
|
|
__switch_to */
|
|
loadsegment(fs, 0);
|
|
ret = wrmsrl_safe(MSR_FS_BASE, addr);
|
|
}
|
|
}
|
|
put_cpu();
|
|
break;
|
|
case ARCH_GET_FS: {
|
|
unsigned long base;
|
|
if (task->thread.fsindex == FS_TLS_SEL)
|
|
base = read_32bit_tls(task, FS_TLS);
|
|
else if (doit)
|
|
rdmsrl(MSR_FS_BASE, base);
|
|
else
|
|
base = task->thread.fs;
|
|
ret = put_user(base, (unsigned long __user *)addr);
|
|
break;
|
|
}
|
|
case ARCH_GET_GS: {
|
|
unsigned long base;
|
|
unsigned gsindex;
|
|
if (task->thread.gsindex == GS_TLS_SEL)
|
|
base = read_32bit_tls(task, GS_TLS);
|
|
else if (doit) {
|
|
savesegment(gs, gsindex);
|
|
if (gsindex)
|
|
rdmsrl(MSR_KERNEL_GS_BASE, base);
|
|
else
|
|
base = task->thread.gs;
|
|
} else
|
|
base = task->thread.gs;
|
|
ret = put_user(base, (unsigned long __user *)addr);
|
|
break;
|
|
}
|
|
|
|
default:
|
|
ret = -EINVAL;
|
|
break;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
long sys_arch_prctl(int code, unsigned long addr)
|
|
{
|
|
return do_arch_prctl(current, code, addr);
|
|
}
|
|
|
|
unsigned long KSTK_ESP(struct task_struct *task)
|
|
{
|
|
return (test_tsk_thread_flag(task, TIF_IA32)) ?
|
|
(task_pt_regs(task)->sp) : ((task)->thread.usersp);
|
|
}
|