mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-25 16:35:34 +07:00
1a5c226528
The main asm/blackfin.h header will pull in mach/blackfin.h to get all the fun Blackfin defines. So having any of the sub-mach headers trying to include asm/blackfin.h makes no sense -- punt it. The mach/blackfin.h header takes care of including the part-specific def headers which in turn will include any other needed def file. Similarly, it takes care of pulling in the part-specific cdef header. So move this logic out of the blackfin.h when necessary. Further, make sure the cdef headers do not waste time including the def headers again. Since all parts need the common def/cdef headers, move this logic out of the part-specific headers and into the mach/blackfin.h file. Finally, we need to split the BF539 def header since the BF538 does not have MXVR and we don't want to expose those MMRs. So now all parts should have the same behavior: mach/blackfin.h asm/def_LPBlackfin.h part-specific def.h if ! asm asm/cdef_LPBlackfin.h part-specific cdef.h And the sub def/cdef headers only tail into what they need. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
303 lines
17 KiB
C
303 lines
17 KiB
C
/*
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* Copyright 2007-2010 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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#ifndef _CDEF_BF549_H
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#define _CDEF_BF549_H
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/* include cdefBF54x_base.h for the set of #defines that are common to all ADSP-BF54x bfin_read_()rocessors */
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#include "cdefBF54x_base.h"
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/* The BF549 is like the BF544, but has MXVR */
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#include "cdefBF547.h"
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/* MXVR Registers */
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#define bfin_read_MXVR_CONFIG() bfin_read16(MXVR_CONFIG)
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#define bfin_write_MXVR_CONFIG(val) bfin_write16(MXVR_CONFIG, val)
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#define bfin_read_MXVR_STATE_0() bfin_read32(MXVR_STATE_0)
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#define bfin_write_MXVR_STATE_0(val) bfin_write32(MXVR_STATE_0, val)
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#define bfin_read_MXVR_STATE_1() bfin_read32(MXVR_STATE_1)
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#define bfin_write_MXVR_STATE_1(val) bfin_write32(MXVR_STATE_1, val)
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#define bfin_read_MXVR_INT_STAT_0() bfin_read32(MXVR_INT_STAT_0)
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#define bfin_write_MXVR_INT_STAT_0(val) bfin_write32(MXVR_INT_STAT_0, val)
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#define bfin_read_MXVR_INT_STAT_1() bfin_read32(MXVR_INT_STAT_1)
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#define bfin_write_MXVR_INT_STAT_1(val) bfin_write32(MXVR_INT_STAT_1, val)
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#define bfin_read_MXVR_INT_EN_0() bfin_read32(MXVR_INT_EN_0)
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#define bfin_write_MXVR_INT_EN_0(val) bfin_write32(MXVR_INT_EN_0, val)
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#define bfin_read_MXVR_INT_EN_1() bfin_read32(MXVR_INT_EN_1)
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#define bfin_write_MXVR_INT_EN_1(val) bfin_write32(MXVR_INT_EN_1, val)
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#define bfin_read_MXVR_POSITION() bfin_read16(MXVR_POSITION)
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#define bfin_write_MXVR_POSITION(val) bfin_write16(MXVR_POSITION, val)
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#define bfin_read_MXVR_MAX_POSITION() bfin_read16(MXVR_MAX_POSITION)
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#define bfin_write_MXVR_MAX_POSITION(val) bfin_write16(MXVR_MAX_POSITION, val)
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#define bfin_read_MXVR_DELAY() bfin_read16(MXVR_DELAY)
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#define bfin_write_MXVR_DELAY(val) bfin_write16(MXVR_DELAY, val)
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#define bfin_read_MXVR_MAX_DELAY() bfin_read16(MXVR_MAX_DELAY)
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#define bfin_write_MXVR_MAX_DELAY(val) bfin_write16(MXVR_MAX_DELAY, val)
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#define bfin_read_MXVR_LADDR() bfin_read32(MXVR_LADDR)
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#define bfin_write_MXVR_LADDR(val) bfin_write32(MXVR_LADDR, val)
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#define bfin_read_MXVR_GADDR() bfin_read16(MXVR_GADDR)
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#define bfin_write_MXVR_GADDR(val) bfin_write16(MXVR_GADDR, val)
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#define bfin_read_MXVR_AADDR() bfin_read32(MXVR_AADDR)
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#define bfin_write_MXVR_AADDR(val) bfin_write32(MXVR_AADDR, val)
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/* MXVR Allocation Table Registers */
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#define bfin_read_MXVR_ALLOC_0() bfin_read32(MXVR_ALLOC_0)
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#define bfin_write_MXVR_ALLOC_0(val) bfin_write32(MXVR_ALLOC_0, val)
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#define bfin_read_MXVR_ALLOC_1() bfin_read32(MXVR_ALLOC_1)
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#define bfin_write_MXVR_ALLOC_1(val) bfin_write32(MXVR_ALLOC_1, val)
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#define bfin_read_MXVR_ALLOC_2() bfin_read32(MXVR_ALLOC_2)
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#define bfin_write_MXVR_ALLOC_2(val) bfin_write32(MXVR_ALLOC_2, val)
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#define bfin_read_MXVR_ALLOC_3() bfin_read32(MXVR_ALLOC_3)
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#define bfin_write_MXVR_ALLOC_3(val) bfin_write32(MXVR_ALLOC_3, val)
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#define bfin_read_MXVR_ALLOC_4() bfin_read32(MXVR_ALLOC_4)
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#define bfin_write_MXVR_ALLOC_4(val) bfin_write32(MXVR_ALLOC_4, val)
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#define bfin_read_MXVR_ALLOC_5() bfin_read32(MXVR_ALLOC_5)
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#define bfin_write_MXVR_ALLOC_5(val) bfin_write32(MXVR_ALLOC_5, val)
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#define bfin_read_MXVR_ALLOC_6() bfin_read32(MXVR_ALLOC_6)
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#define bfin_write_MXVR_ALLOC_6(val) bfin_write32(MXVR_ALLOC_6, val)
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#define bfin_read_MXVR_ALLOC_7() bfin_read32(MXVR_ALLOC_7)
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#define bfin_write_MXVR_ALLOC_7(val) bfin_write32(MXVR_ALLOC_7, val)
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#define bfin_read_MXVR_ALLOC_8() bfin_read32(MXVR_ALLOC_8)
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#define bfin_write_MXVR_ALLOC_8(val) bfin_write32(MXVR_ALLOC_8, val)
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#define bfin_read_MXVR_ALLOC_9() bfin_read32(MXVR_ALLOC_9)
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#define bfin_write_MXVR_ALLOC_9(val) bfin_write32(MXVR_ALLOC_9, val)
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#define bfin_read_MXVR_ALLOC_10() bfin_read32(MXVR_ALLOC_10)
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#define bfin_write_MXVR_ALLOC_10(val) bfin_write32(MXVR_ALLOC_10, val)
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#define bfin_read_MXVR_ALLOC_11() bfin_read32(MXVR_ALLOC_11)
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#define bfin_write_MXVR_ALLOC_11(val) bfin_write32(MXVR_ALLOC_11, val)
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#define bfin_read_MXVR_ALLOC_12() bfin_read32(MXVR_ALLOC_12)
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#define bfin_write_MXVR_ALLOC_12(val) bfin_write32(MXVR_ALLOC_12, val)
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#define bfin_read_MXVR_ALLOC_13() bfin_read32(MXVR_ALLOC_13)
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#define bfin_write_MXVR_ALLOC_13(val) bfin_write32(MXVR_ALLOC_13, val)
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#define bfin_read_MXVR_ALLOC_14() bfin_read32(MXVR_ALLOC_14)
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#define bfin_write_MXVR_ALLOC_14(val) bfin_write32(MXVR_ALLOC_14, val)
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/* MXVR Channel Assign Registers */
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#define bfin_read_MXVR_SYNC_LCHAN_0() bfin_read32(MXVR_SYNC_LCHAN_0)
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#define bfin_write_MXVR_SYNC_LCHAN_0(val) bfin_write32(MXVR_SYNC_LCHAN_0, val)
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#define bfin_read_MXVR_SYNC_LCHAN_1() bfin_read32(MXVR_SYNC_LCHAN_1)
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#define bfin_write_MXVR_SYNC_LCHAN_1(val) bfin_write32(MXVR_SYNC_LCHAN_1, val)
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#define bfin_read_MXVR_SYNC_LCHAN_2() bfin_read32(MXVR_SYNC_LCHAN_2)
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#define bfin_write_MXVR_SYNC_LCHAN_2(val) bfin_write32(MXVR_SYNC_LCHAN_2, val)
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#define bfin_read_MXVR_SYNC_LCHAN_3() bfin_read32(MXVR_SYNC_LCHAN_3)
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#define bfin_write_MXVR_SYNC_LCHAN_3(val) bfin_write32(MXVR_SYNC_LCHAN_3, val)
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#define bfin_read_MXVR_SYNC_LCHAN_4() bfin_read32(MXVR_SYNC_LCHAN_4)
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#define bfin_write_MXVR_SYNC_LCHAN_4(val) bfin_write32(MXVR_SYNC_LCHAN_4, val)
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#define bfin_read_MXVR_SYNC_LCHAN_5() bfin_read32(MXVR_SYNC_LCHAN_5)
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#define bfin_write_MXVR_SYNC_LCHAN_5(val) bfin_write32(MXVR_SYNC_LCHAN_5, val)
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#define bfin_read_MXVR_SYNC_LCHAN_6() bfin_read32(MXVR_SYNC_LCHAN_6)
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#define bfin_write_MXVR_SYNC_LCHAN_6(val) bfin_write32(MXVR_SYNC_LCHAN_6, val)
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#define bfin_read_MXVR_SYNC_LCHAN_7() bfin_read32(MXVR_SYNC_LCHAN_7)
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#define bfin_write_MXVR_SYNC_LCHAN_7(val) bfin_write32(MXVR_SYNC_LCHAN_7, val)
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/* MXVR DMA0 Registers */
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#define bfin_read_MXVR_DMA0_CONFIG() bfin_read32(MXVR_DMA0_CONFIG)
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#define bfin_write_MXVR_DMA0_CONFIG(val) bfin_write32(MXVR_DMA0_CONFIG, val)
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#define bfin_read_MXVR_DMA0_START_ADDR() bfin_read32(MXVR_DMA0_START_ADDR)
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#define bfin_write_MXVR_DMA0_START_ADDR(val) bfin_write32(MXVR_DMA0_START_ADDR)
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#define bfin_read_MXVR_DMA0_COUNT() bfin_read16(MXVR_DMA0_COUNT)
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#define bfin_write_MXVR_DMA0_COUNT(val) bfin_write16(MXVR_DMA0_COUNT, val)
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#define bfin_read_MXVR_DMA0_CURR_ADDR() bfin_read32(MXVR_DMA0_CURR_ADDR)
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#define bfin_write_MXVR_DMA0_CURR_ADDR(val) bfin_write32(MXVR_DMA0_CURR_ADDR)
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#define bfin_read_MXVR_DMA0_CURR_COUNT() bfin_read16(MXVR_DMA0_CURR_COUNT)
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#define bfin_write_MXVR_DMA0_CURR_COUNT(val) bfin_write16(MXVR_DMA0_CURR_COUNT, val)
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/* MXVR DMA1 Registers */
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#define bfin_read_MXVR_DMA1_CONFIG() bfin_read32(MXVR_DMA1_CONFIG)
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#define bfin_write_MXVR_DMA1_CONFIG(val) bfin_write32(MXVR_DMA1_CONFIG, val)
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#define bfin_read_MXVR_DMA1_START_ADDR() bfin_read32(MXVR_DMA1_START_ADDR)
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#define bfin_write_MXVR_DMA1_START_ADDR(val) bfin_write32(MXVR_DMA1_START_ADDR)
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#define bfin_read_MXVR_DMA1_COUNT() bfin_read16(MXVR_DMA1_COUNT)
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#define bfin_write_MXVR_DMA1_COUNT(val) bfin_write16(MXVR_DMA1_COUNT, val)
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#define bfin_read_MXVR_DMA1_CURR_ADDR() bfin_read32(MXVR_DMA1_CURR_ADDR)
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#define bfin_write_MXVR_DMA1_CURR_ADDR(val) bfin_write32(MXVR_DMA1_CURR_ADDR)
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#define bfin_read_MXVR_DMA1_CURR_COUNT() bfin_read16(MXVR_DMA1_CURR_COUNT)
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#define bfin_write_MXVR_DMA1_CURR_COUNT(val) bfin_write16(MXVR_DMA1_CURR_COUNT, val)
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/* MXVR DMA2 Registers */
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#define bfin_read_MXVR_DMA2_CONFIG() bfin_read32(MXVR_DMA2_CONFIG)
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#define bfin_write_MXVR_DMA2_CONFIG(val) bfin_write32(MXVR_DMA2_CONFIG, val)
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#define bfin_read_MXVR_DMA2_START_ADDR() bfin_read32(MXVR_DMA2_START_ADDR)
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#define bfin_write_MXVR_DMA2_START_ADDR(val) bfin_write32(MXVR_DMA2_START_ADDR)
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#define bfin_read_MXVR_DMA2_COUNT() bfin_read16(MXVR_DMA2_COUNT)
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#define bfin_write_MXVR_DMA2_COUNT(val) bfin_write16(MXVR_DMA2_COUNT, val)
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#define bfin_read_MXVR_DMA2_CURR_ADDR() bfin_read32(MXVR_DMA2_CURR_ADDR)
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#define bfin_write_MXVR_DMA2_CURR_ADDR(val) bfin_write32(MXVR_DMA2_CURR_ADDR)
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#define bfin_read_MXVR_DMA2_CURR_COUNT() bfin_read16(MXVR_DMA2_CURR_COUNT)
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#define bfin_write_MXVR_DMA2_CURR_COUNT(val) bfin_write16(MXVR_DMA2_CURR_COUNT, val)
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/* MXVR DMA3 Registers */
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#define bfin_read_MXVR_DMA3_CONFIG() bfin_read32(MXVR_DMA3_CONFIG)
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#define bfin_write_MXVR_DMA3_CONFIG(val) bfin_write32(MXVR_DMA3_CONFIG, val)
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#define bfin_read_MXVR_DMA3_START_ADDR() bfin_read32(MXVR_DMA3_START_ADDR)
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#define bfin_write_MXVR_DMA3_START_ADDR(val) bfin_write32(MXVR_DMA3_START_ADDR)
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#define bfin_read_MXVR_DMA3_COUNT() bfin_read16(MXVR_DMA3_COUNT)
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#define bfin_write_MXVR_DMA3_COUNT(val) bfin_write16(MXVR_DMA3_COUNT, val)
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#define bfin_read_MXVR_DMA3_CURR_ADDR() bfin_read32(MXVR_DMA3_CURR_ADDR)
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#define bfin_write_MXVR_DMA3_CURR_ADDR(val) bfin_write32(MXVR_DMA3_CURR_ADDR)
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#define bfin_read_MXVR_DMA3_CURR_COUNT() bfin_read16(MXVR_DMA3_CURR_COUNT)
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#define bfin_write_MXVR_DMA3_CURR_COUNT(val) bfin_write16(MXVR_DMA3_CURR_COUNT, val)
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/* MXVR DMA4 Registers */
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#define bfin_read_MXVR_DMA4_CONFIG() bfin_read32(MXVR_DMA4_CONFIG)
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#define bfin_write_MXVR_DMA4_CONFIG(val) bfin_write32(MXVR_DMA4_CONFIG, val)
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#define bfin_read_MXVR_DMA4_START_ADDR() bfin_read32(MXVR_DMA4_START_ADDR)
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#define bfin_write_MXVR_DMA4_START_ADDR(val) bfin_write32(MXVR_DMA4_START_ADDR)
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#define bfin_read_MXVR_DMA4_COUNT() bfin_read16(MXVR_DMA4_COUNT)
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#define bfin_write_MXVR_DMA4_COUNT(val) bfin_write16(MXVR_DMA4_COUNT, val)
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#define bfin_read_MXVR_DMA4_CURR_ADDR() bfin_read32(MXVR_DMA4_CURR_ADDR)
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#define bfin_write_MXVR_DMA4_CURR_ADDR(val) bfin_write32(MXVR_DMA4_CURR_ADDR)
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#define bfin_read_MXVR_DMA4_CURR_COUNT() bfin_read16(MXVR_DMA4_CURR_COUNT)
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#define bfin_write_MXVR_DMA4_CURR_COUNT(val) bfin_write16(MXVR_DMA4_CURR_COUNT, val)
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/* MXVR DMA5 Registers */
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#define bfin_read_MXVR_DMA5_CONFIG() bfin_read32(MXVR_DMA5_CONFIG)
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#define bfin_write_MXVR_DMA5_CONFIG(val) bfin_write32(MXVR_DMA5_CONFIG, val)
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#define bfin_read_MXVR_DMA5_START_ADDR() bfin_read32(MXVR_DMA5_START_ADDR)
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#define bfin_write_MXVR_DMA5_START_ADDR(val) bfin_write32(MXVR_DMA5_START_ADDR)
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#define bfin_read_MXVR_DMA5_COUNT() bfin_read16(MXVR_DMA5_COUNT)
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#define bfin_write_MXVR_DMA5_COUNT(val) bfin_write16(MXVR_DMA5_COUNT, val)
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#define bfin_read_MXVR_DMA5_CURR_ADDR() bfin_read32(MXVR_DMA5_CURR_ADDR)
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#define bfin_write_MXVR_DMA5_CURR_ADDR(val) bfin_write32(MXVR_DMA5_CURR_ADDR)
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#define bfin_read_MXVR_DMA5_CURR_COUNT() bfin_read16(MXVR_DMA5_CURR_COUNT)
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#define bfin_write_MXVR_DMA5_CURR_COUNT(val) bfin_write16(MXVR_DMA5_CURR_COUNT, val)
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/* MXVR DMA6 Registers */
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#define bfin_read_MXVR_DMA6_CONFIG() bfin_read32(MXVR_DMA6_CONFIG)
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#define bfin_write_MXVR_DMA6_CONFIG(val) bfin_write32(MXVR_DMA6_CONFIG, val)
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#define bfin_read_MXVR_DMA6_START_ADDR() bfin_read32(MXVR_DMA6_START_ADDR)
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#define bfin_write_MXVR_DMA6_START_ADDR(val) bfin_write32(MXVR_DMA6_START_ADDR)
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#define bfin_read_MXVR_DMA6_COUNT() bfin_read16(MXVR_DMA6_COUNT)
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#define bfin_write_MXVR_DMA6_COUNT(val) bfin_write16(MXVR_DMA6_COUNT, val)
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#define bfin_read_MXVR_DMA6_CURR_ADDR() bfin_read32(MXVR_DMA6_CURR_ADDR)
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#define bfin_write_MXVR_DMA6_CURR_ADDR(val) bfin_write32(MXVR_DMA6_CURR_ADDR)
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#define bfin_read_MXVR_DMA6_CURR_COUNT() bfin_read16(MXVR_DMA6_CURR_COUNT)
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#define bfin_write_MXVR_DMA6_CURR_COUNT(val) bfin_write16(MXVR_DMA6_CURR_COUNT, val)
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/* MXVR DMA7 Registers */
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#define bfin_read_MXVR_DMA7_CONFIG() bfin_read32(MXVR_DMA7_CONFIG)
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#define bfin_write_MXVR_DMA7_CONFIG(val) bfin_write32(MXVR_DMA7_CONFIG, val)
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#define bfin_read_MXVR_DMA7_START_ADDR() bfin_read32(MXVR_DMA7_START_ADDR)
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#define bfin_write_MXVR_DMA7_START_ADDR(val) bfin_write32(MXVR_DMA7_START_ADDR)
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#define bfin_read_MXVR_DMA7_COUNT() bfin_read16(MXVR_DMA7_COUNT)
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#define bfin_write_MXVR_DMA7_COUNT(val) bfin_write16(MXVR_DMA7_COUNT, val)
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#define bfin_read_MXVR_DMA7_CURR_ADDR() bfin_read32(MXVR_DMA7_CURR_ADDR)
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#define bfin_write_MXVR_DMA7_CURR_ADDR(val) bfin_write32(MXVR_DMA7_CURR_ADDR)
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#define bfin_read_MXVR_DMA7_CURR_COUNT() bfin_read16(MXVR_DMA7_CURR_COUNT)
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#define bfin_write_MXVR_DMA7_CURR_COUNT(val) bfin_write16(MXVR_DMA7_CURR_COUNT, val)
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/* MXVR Asynch Packet Registers */
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#define bfin_read_MXVR_AP_CTL() bfin_read16(MXVR_AP_CTL)
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#define bfin_write_MXVR_AP_CTL(val) bfin_write16(MXVR_AP_CTL, val)
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#define bfin_read_MXVR_APRB_START_ADDR() bfin_read32(MXVR_APRB_START_ADDR)
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#define bfin_write_MXVR_APRB_START_ADDR(val) bfin_write32(MXVR_APRB_START_ADDR)
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#define bfin_read_MXVR_APRB_CURR_ADDR() bfin_read32(MXVR_APRB_CURR_ADDR)
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#define bfin_write_MXVR_APRB_CURR_ADDR(val) bfin_write32(MXVR_APRB_CURR_ADDR)
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#define bfin_read_MXVR_APTB_START_ADDR() bfin_read32(MXVR_APTB_START_ADDR)
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#define bfin_write_MXVR_APTB_START_ADDR(val) bfin_write32(MXVR_APTB_START_ADDR)
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#define bfin_read_MXVR_APTB_CURR_ADDR() bfin_read32(MXVR_APTB_CURR_ADDR)
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#define bfin_write_MXVR_APTB_CURR_ADDR(val) bfin_write32(MXVR_APTB_CURR_ADDR)
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/* MXVR Control Message Registers */
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#define bfin_read_MXVR_CM_CTL() bfin_read32(MXVR_CM_CTL)
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#define bfin_write_MXVR_CM_CTL(val) bfin_write32(MXVR_CM_CTL, val)
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#define bfin_read_MXVR_CMRB_START_ADDR() bfin_read32(MXVR_CMRB_START_ADDR)
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#define bfin_write_MXVR_CMRB_START_ADDR(val) bfin_write32(MXVR_CMRB_START_ADDR)
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#define bfin_read_MXVR_CMRB_CURR_ADDR() bfin_read32(MXVR_CMRB_CURR_ADDR)
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#define bfin_write_MXVR_CMRB_CURR_ADDR(val) bfin_write32(MXVR_CMRB_CURR_ADDR)
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#define bfin_read_MXVR_CMTB_START_ADDR() bfin_read32(MXVR_CMTB_START_ADDR)
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#define bfin_write_MXVR_CMTB_START_ADDR(val) bfin_write32(MXVR_CMTB_START_ADDR)
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#define bfin_read_MXVR_CMTB_CURR_ADDR() bfin_read32(MXVR_CMTB_CURR_ADDR)
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#define bfin_write_MXVR_CMTB_CURR_ADDR(val) bfin_write32(MXVR_CMTB_CURR_ADDR)
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/* MXVR Remote Read Registers */
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#define bfin_read_MXVR_RRDB_START_ADDR() bfin_read32(MXVR_RRDB_START_ADDR)
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#define bfin_write_MXVR_RRDB_START_ADDR(val) bfin_write32(MXVR_RRDB_START_ADDR)
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#define bfin_read_MXVR_RRDB_CURR_ADDR() bfin_read32(MXVR_RRDB_CURR_ADDR)
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#define bfin_write_MXVR_RRDB_CURR_ADDR(val) bfin_write32(MXVR_RRDB_CURR_ADDR)
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/* MXVR Pattern Data Registers */
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#define bfin_read_MXVR_PAT_DATA_0() bfin_read32(MXVR_PAT_DATA_0)
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#define bfin_write_MXVR_PAT_DATA_0(val) bfin_write32(MXVR_PAT_DATA_0, val)
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#define bfin_read_MXVR_PAT_EN_0() bfin_read32(MXVR_PAT_EN_0)
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#define bfin_write_MXVR_PAT_EN_0(val) bfin_write32(MXVR_PAT_EN_0, val)
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#define bfin_read_MXVR_PAT_DATA_1() bfin_read32(MXVR_PAT_DATA_1)
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#define bfin_write_MXVR_PAT_DATA_1(val) bfin_write32(MXVR_PAT_DATA_1, val)
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#define bfin_read_MXVR_PAT_EN_1() bfin_read32(MXVR_PAT_EN_1)
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#define bfin_write_MXVR_PAT_EN_1(val) bfin_write32(MXVR_PAT_EN_1, val)
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/* MXVR Frame Counter Registers */
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#define bfin_read_MXVR_FRAME_CNT_0() bfin_read16(MXVR_FRAME_CNT_0)
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#define bfin_write_MXVR_FRAME_CNT_0(val) bfin_write16(MXVR_FRAME_CNT_0, val)
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#define bfin_read_MXVR_FRAME_CNT_1() bfin_read16(MXVR_FRAME_CNT_1)
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#define bfin_write_MXVR_FRAME_CNT_1(val) bfin_write16(MXVR_FRAME_CNT_1, val)
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/* MXVR Routing Table Registers */
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#define bfin_read_MXVR_ROUTING_0() bfin_read32(MXVR_ROUTING_0)
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#define bfin_write_MXVR_ROUTING_0(val) bfin_write32(MXVR_ROUTING_0, val)
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#define bfin_read_MXVR_ROUTING_1() bfin_read32(MXVR_ROUTING_1)
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#define bfin_write_MXVR_ROUTING_1(val) bfin_write32(MXVR_ROUTING_1, val)
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#define bfin_read_MXVR_ROUTING_2() bfin_read32(MXVR_ROUTING_2)
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#define bfin_write_MXVR_ROUTING_2(val) bfin_write32(MXVR_ROUTING_2, val)
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#define bfin_read_MXVR_ROUTING_3() bfin_read32(MXVR_ROUTING_3)
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#define bfin_write_MXVR_ROUTING_3(val) bfin_write32(MXVR_ROUTING_3, val)
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#define bfin_read_MXVR_ROUTING_4() bfin_read32(MXVR_ROUTING_4)
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#define bfin_write_MXVR_ROUTING_4(val) bfin_write32(MXVR_ROUTING_4, val)
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#define bfin_read_MXVR_ROUTING_5() bfin_read32(MXVR_ROUTING_5)
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#define bfin_write_MXVR_ROUTING_5(val) bfin_write32(MXVR_ROUTING_5, val)
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#define bfin_read_MXVR_ROUTING_6() bfin_read32(MXVR_ROUTING_6)
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#define bfin_write_MXVR_ROUTING_6(val) bfin_write32(MXVR_ROUTING_6, val)
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#define bfin_read_MXVR_ROUTING_7() bfin_read32(MXVR_ROUTING_7)
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#define bfin_write_MXVR_ROUTING_7(val) bfin_write32(MXVR_ROUTING_7, val)
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#define bfin_read_MXVR_ROUTING_8() bfin_read32(MXVR_ROUTING_8)
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#define bfin_write_MXVR_ROUTING_8(val) bfin_write32(MXVR_ROUTING_8, val)
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#define bfin_read_MXVR_ROUTING_9() bfin_read32(MXVR_ROUTING_9)
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#define bfin_write_MXVR_ROUTING_9(val) bfin_write32(MXVR_ROUTING_9, val)
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#define bfin_read_MXVR_ROUTING_10() bfin_read32(MXVR_ROUTING_10)
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#define bfin_write_MXVR_ROUTING_10(val) bfin_write32(MXVR_ROUTING_10, val)
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#define bfin_read_MXVR_ROUTING_11() bfin_read32(MXVR_ROUTING_11)
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#define bfin_write_MXVR_ROUTING_11(val) bfin_write32(MXVR_ROUTING_11, val)
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#define bfin_read_MXVR_ROUTING_12() bfin_read32(MXVR_ROUTING_12)
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#define bfin_write_MXVR_ROUTING_12(val) bfin_write32(MXVR_ROUTING_12, val)
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#define bfin_read_MXVR_ROUTING_13() bfin_read32(MXVR_ROUTING_13)
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#define bfin_write_MXVR_ROUTING_13(val) bfin_write32(MXVR_ROUTING_13, val)
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#define bfin_read_MXVR_ROUTING_14() bfin_read32(MXVR_ROUTING_14)
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#define bfin_write_MXVR_ROUTING_14(val) bfin_write32(MXVR_ROUTING_14, val)
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/* MXVR Counter-Clock-Control Registers */
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#define bfin_read_MXVR_BLOCK_CNT() bfin_read16(MXVR_BLOCK_CNT)
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#define bfin_write_MXVR_BLOCK_CNT(val) bfin_write16(MXVR_BLOCK_CNT, val)
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#define bfin_read_MXVR_CLK_CTL() bfin_read32(MXVR_CLK_CTL)
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#define bfin_write_MXVR_CLK_CTL(val) bfin_write32(MXVR_CLK_CTL, val)
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#define bfin_read_MXVR_CDRPLL_CTL() bfin_read32(MXVR_CDRPLL_CTL)
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#define bfin_write_MXVR_CDRPLL_CTL(val) bfin_write32(MXVR_CDRPLL_CTL, val)
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#define bfin_read_MXVR_FMPLL_CTL() bfin_read32(MXVR_FMPLL_CTL)
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#define bfin_write_MXVR_FMPLL_CTL(val) bfin_write32(MXVR_FMPLL_CTL, val)
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#define bfin_read_MXVR_PIN_CTL() bfin_read16(MXVR_PIN_CTL)
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#define bfin_write_MXVR_PIN_CTL(val) bfin_write16(MXVR_PIN_CTL, val)
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#define bfin_read_MXVR_SCLK_CNT() bfin_read16(MXVR_SCLK_CNT)
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#define bfin_write_MXVR_SCLK_CNT(val) bfin_write16(MXVR_SCLK_CNT, val)
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#endif /* _CDEF_BF549_H */
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