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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-16 08:06:44 +07:00
7e5873d375
The "a" version of the MT7620 has single port PCIE bus. The driver is straightforward without any special magic required. The driver works on MT7620 and MT7628. There are a few magic values that get written to the pcie phy and a register of which we only know the name. I marked these places as vodoo in the comments above the code. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11996/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
69 lines
2.8 KiB
Makefile
69 lines
2.8 KiB
Makefile
#
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# Makefile for the PCI specific kernel interface routines under Linux.
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#
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obj-y += pci.o
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#
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# PCI bus host bridge specific code
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#
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obj-$(CONFIG_MIPS_BONITO64) += ops-bonito64.o
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obj-$(CONFIG_PCI_GT64XXX_PCI0) += ops-gt64xxx_pci0.o
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obj-$(CONFIG_MIPS_MSC) += ops-msc.o
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obj-$(CONFIG_MIPS_NILE4) += ops-nile4.o
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obj-$(CONFIG_SOC_TX3927) += ops-tx3927.o
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obj-$(CONFIG_PCI_VR41XX) += ops-vr41xx.o pci-vr41xx.o
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obj-$(CONFIG_NEC_MARKEINS) += ops-emma2rh.o pci-emma2rh.o fixup-emma2rh.o
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obj-$(CONFIG_PCI_TX4927) += ops-tx4927.o
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obj-$(CONFIG_BCM47XX) += pci-bcm47xx.o
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obj-$(CONFIG_BCM63XX) += pci-bcm63xx.o fixup-bcm63xx.o \
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ops-bcm63xx.o
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obj-$(CONFIG_MIPS_ALCHEMY) += pci-alchemy.o
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obj-$(CONFIG_PCI_AR2315) += pci-ar2315.o
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obj-$(CONFIG_SOC_AR71XX) += pci-ar71xx.o
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obj-$(CONFIG_PCI_AR724X) += pci-ar724x.o
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obj-$(CONFIG_MIPS_PCI_VIRTIO) += pci-virtio-guest.o
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#
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# These are still pretty much in the old state, watch, go blind.
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#
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obj-$(CONFIG_LASAT) += pci-lasat.o
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obj-$(CONFIG_MIPS_COBALT) += fixup-cobalt.o
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obj-$(CONFIG_LEMOTE_FULOONG2E) += fixup-fuloong2e.o ops-loongson2.o
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obj-$(CONFIG_LEMOTE_MACH2F) += fixup-lemote2f.o ops-loongson2.o
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obj-$(CONFIG_LOONGSON_MACH3X) += fixup-loongson3.o ops-loongson3.o
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obj-$(CONFIG_MIPS_MALTA) += fixup-malta.o pci-malta.o
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obj-$(CONFIG_PMC_MSP7120_GW) += fixup-pmcmsp.o ops-pmcmsp.o
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obj-$(CONFIG_PMC_MSP7120_EVAL) += fixup-pmcmsp.o ops-pmcmsp.o
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obj-$(CONFIG_PMC_MSP7120_FPGA) += fixup-pmcmsp.o ops-pmcmsp.o
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obj-$(CONFIG_SGI_IP27) += ops-bridge.o pci-ip27.o
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obj-$(CONFIG_SGI_IP32) += fixup-ip32.o ops-mace.o pci-ip32.o
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obj-$(CONFIG_SIBYTE_SB1250) += fixup-sb1250.o pci-sb1250.o
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obj-$(CONFIG_SIBYTE_BCM112X) += fixup-sb1250.o pci-sb1250.o
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obj-$(CONFIG_SIBYTE_BCM1x80) += pci-bcm1480.o pci-bcm1480ht.o
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obj-$(CONFIG_SNI_RM) += fixup-sni.o ops-sni.o
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obj-$(CONFIG_LANTIQ) += fixup-lantiq.o
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obj-$(CONFIG_PCI_LANTIQ) += pci-lantiq.o ops-lantiq.o
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obj-$(CONFIG_SOC_MT7620) += pci-mt7620.o
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obj-$(CONFIG_SOC_RT288X) += pci-rt2880.o
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obj-$(CONFIG_SOC_RT3883) += pci-rt3883.o
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obj-$(CONFIG_TANBAC_TB0219) += fixup-tb0219.o
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obj-$(CONFIG_TANBAC_TB0226) += fixup-tb0226.o
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obj-$(CONFIG_TANBAC_TB0287) += fixup-tb0287.o
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obj-$(CONFIG_TOSHIBA_JMR3927) += fixup-jmr3927.o
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obj-$(CONFIG_SOC_TX4927) += pci-tx4927.o
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obj-$(CONFIG_SOC_TX4938) += pci-tx4938.o
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obj-$(CONFIG_SOC_TX4939) += pci-tx4939.o
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obj-$(CONFIG_TOSHIBA_RBTX4927) += fixup-rbtx4927.o
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obj-$(CONFIG_TOSHIBA_RBTX4938) += fixup-rbtx4938.o
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obj-$(CONFIG_VICTOR_MPC30X) += fixup-mpc30x.o
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obj-$(CONFIG_ZAO_CAPCELLA) += fixup-capcella.o
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obj-$(CONFIG_MIKROTIK_RB532) += pci-rc32434.o ops-rc32434.o fixup-rc32434.o
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obj-$(CONFIG_CAVIUM_OCTEON_SOC) += pci-octeon.o pcie-octeon.o
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obj-$(CONFIG_CPU_XLR) += pci-xlr.o
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obj-$(CONFIG_CPU_XLP) += pci-xlp.o
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ifdef CONFIG_PCI_MSI
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obj-$(CONFIG_CAVIUM_OCTEON_SOC) += msi-octeon.o
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obj-$(CONFIG_CPU_XLP) += msi-xlp.o
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endif
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