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2f5fa41a7a
ICC_SRE_EL1 is a system register allowing msr/mrs accesses to the GIC CPU interface for EL1 (guests). Currently we force it to 0, but for proper GICv3 support we have to allow guests to use it (depending on their selected virtual GIC model). So add ICC_SRE_EL1 to the list of saved/restored registers on a world switch, but actually disallow a guest to change it by only restoring a fixed, once-initialized value. This value depends on the GIC model userland has chosen for a guest. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> |
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.. | ||
arm | ||
async_pf.c | ||
async_pf.h | ||
coalesced_mmio.c | ||
coalesced_mmio.h | ||
eventfd.c | ||
iodev.h | ||
irqchip.c | ||
Kconfig | ||
kvm_main.c | ||
vfio.c | ||
vfio.h |