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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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dd0421f475
The display frontend is an hardware block that can be used to implement some more advanced features like hardware scaling or colorspace conversions. It can also be used to implement the output format of the VPU. Let's create a minimal driver for it that will only enable the hardware scaling features. Reviewed-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Link: https://patchwork.freedesktop.org/patch/msgid/029cdc3478bf89d422f5e8d9e600baf5e48ce4db.1516613040.git-series.maxime.ripard@free-electrons.com
390 lines
11 KiB
C
390 lines
11 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2017 Free Electrons
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* Maxime Ripard <maxime.ripard@free-electrons.com>
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*/
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#include <drm/drmP.h>
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#include <drm/drm_gem_cma_helper.h>
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#include <drm/drm_fb_cma_helper.h>
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#include <linux/clk.h>
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#include <linux/component.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/regmap.h>
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#include <linux/reset.h>
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#include "sun4i_drv.h"
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#include "sun4i_frontend.h"
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static const u32 sun4i_frontend_vert_coef[32] = {
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0x00004000, 0x000140ff, 0x00033ffe, 0x00043ffd,
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0x00063efc, 0xff083dfc, 0x000a3bfb, 0xff0d39fb,
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0xff0f37fb, 0xff1136fa, 0xfe1433fb, 0xfe1631fb,
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0xfd192ffb, 0xfd1c2cfb, 0xfd1f29fb, 0xfc2127fc,
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0xfc2424fc, 0xfc2721fc, 0xfb291ffd, 0xfb2c1cfd,
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0xfb2f19fd, 0xfb3116fe, 0xfb3314fe, 0xfa3611ff,
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0xfb370fff, 0xfb390dff, 0xfb3b0a00, 0xfc3d08ff,
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0xfc3e0600, 0xfd3f0400, 0xfe3f0300, 0xff400100,
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};
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static const u32 sun4i_frontend_horz_coef[64] = {
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0x40000000, 0x00000000, 0x40fe0000, 0x0000ff03,
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0x3ffd0000, 0x0000ff05, 0x3ffc0000, 0x0000ff06,
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0x3efb0000, 0x0000ff08, 0x3dfb0000, 0x0000ff09,
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0x3bfa0000, 0x0000fe0d, 0x39fa0000, 0x0000fe0f,
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0x38fa0000, 0x0000fe10, 0x36fa0000, 0x0000fe12,
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0x33fa0000, 0x0000fd16, 0x31fa0000, 0x0000fd18,
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0x2ffa0000, 0x0000fd1a, 0x2cfa0000, 0x0000fc1e,
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0x29fa0000, 0x0000fc21, 0x27fb0000, 0x0000fb23,
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0x24fb0000, 0x0000fb26, 0x21fb0000, 0x0000fb29,
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0x1ffc0000, 0x0000fa2b, 0x1cfc0000, 0x0000fa2e,
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0x19fd0000, 0x0000fa30, 0x16fd0000, 0x0000fa33,
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0x14fd0000, 0x0000fa35, 0x11fe0000, 0x0000fa37,
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0x0ffe0000, 0x0000fa39, 0x0dfe0000, 0x0000fa3b,
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0x0afe0000, 0x0000fa3e, 0x08ff0000, 0x0000fb3e,
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0x06ff0000, 0x0000fb40, 0x05ff0000, 0x0000fc40,
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0x03ff0000, 0x0000fd41, 0x01ff0000, 0x0000fe42,
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};
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static void sun4i_frontend_scaler_init(struct sun4i_frontend *frontend)
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{
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int i;
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for (i = 0; i < 32; i++) {
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regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_HORZCOEF0_REG(i),
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sun4i_frontend_horz_coef[2 * i]);
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regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_HORZCOEF0_REG(i),
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sun4i_frontend_horz_coef[2 * i]);
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regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_HORZCOEF1_REG(i),
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sun4i_frontend_horz_coef[2 * i + 1]);
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regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_HORZCOEF1_REG(i),
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sun4i_frontend_horz_coef[2 * i + 1]);
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regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_VERTCOEF_REG(i),
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sun4i_frontend_vert_coef[i]);
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regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_VERTCOEF_REG(i),
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sun4i_frontend_vert_coef[i]);
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}
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regmap_update_bits(frontend->regs, SUN4I_FRONTEND_FRM_CTRL_REG,
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SUN4I_FRONTEND_FRM_CTRL_COEF_ACCESS_CTRL,
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SUN4I_FRONTEND_FRM_CTRL_COEF_ACCESS_CTRL);
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}
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int sun4i_frontend_init(struct sun4i_frontend *frontend)
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{
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return pm_runtime_get_sync(frontend->dev);
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}
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EXPORT_SYMBOL(sun4i_frontend_init);
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void sun4i_frontend_exit(struct sun4i_frontend *frontend)
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{
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pm_runtime_put(frontend->dev);
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}
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EXPORT_SYMBOL(sun4i_frontend_exit);
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void sun4i_frontend_update_buffer(struct sun4i_frontend *frontend,
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struct drm_plane *plane)
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{
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struct drm_plane_state *state = plane->state;
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struct drm_framebuffer *fb = state->fb;
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dma_addr_t paddr;
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/* Set the line width */
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DRM_DEBUG_DRIVER("Frontend stride: %d bytes\n", fb->pitches[0]);
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regmap_write(frontend->regs, SUN4I_FRONTEND_LINESTRD0_REG,
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fb->pitches[0]);
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/* Set the physical address of the buffer in memory */
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paddr = drm_fb_cma_get_gem_addr(fb, state, 0);
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paddr -= PHYS_OFFSET;
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DRM_DEBUG_DRIVER("Setting buffer address to %pad\n", &paddr);
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regmap_write(frontend->regs, SUN4I_FRONTEND_BUF_ADDR0_REG, paddr);
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}
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EXPORT_SYMBOL(sun4i_frontend_update_buffer);
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static int sun4i_frontend_drm_format_to_input_fmt(uint32_t fmt, u32 *val)
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{
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switch (fmt) {
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case DRM_FORMAT_ARGB8888:
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*val = 5;
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return 0;
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default:
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return -EINVAL;
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}
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}
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static int sun4i_frontend_drm_format_to_output_fmt(uint32_t fmt, u32 *val)
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{
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switch (fmt) {
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case DRM_FORMAT_XRGB8888:
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case DRM_FORMAT_ARGB8888:
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*val = 2;
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return 0;
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default:
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return -EINVAL;
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}
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}
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int sun4i_frontend_update_formats(struct sun4i_frontend *frontend,
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struct drm_plane *plane, uint32_t out_fmt)
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{
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struct drm_plane_state *state = plane->state;
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struct drm_framebuffer *fb = state->fb;
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u32 out_fmt_val;
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u32 in_fmt_val;
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int ret;
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ret = sun4i_frontend_drm_format_to_input_fmt(fb->format->format,
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&in_fmt_val);
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if (ret) {
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DRM_DEBUG_DRIVER("Invalid input format\n");
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return ret;
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}
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ret = sun4i_frontend_drm_format_to_output_fmt(out_fmt, &out_fmt_val);
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if (ret) {
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DRM_DEBUG_DRIVER("Invalid output format\n");
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return ret;
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}
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/*
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* I have no idea what this does exactly, but it seems to be
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* related to the scaler FIR filter phase parameters.
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*/
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regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_HORZPHASE_REG, 0x400);
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regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_HORZPHASE_REG, 0x400);
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regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_VERTPHASE0_REG, 0x400);
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regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_VERTPHASE0_REG, 0x400);
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regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_VERTPHASE1_REG, 0x400);
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regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_VERTPHASE1_REG, 0x400);
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regmap_write(frontend->regs, SUN4I_FRONTEND_INPUT_FMT_REG,
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SUN4I_FRONTEND_INPUT_FMT_DATA_MOD(1) |
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SUN4I_FRONTEND_INPUT_FMT_DATA_FMT(in_fmt_val) |
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SUN4I_FRONTEND_INPUT_FMT_PS(1));
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/*
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* TODO: It look like the A31 and A80 at least will need the
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* bit 7 (ALPHA_EN) enabled when using a format with alpha (so
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* ARGB8888).
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*/
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regmap_write(frontend->regs, SUN4I_FRONTEND_OUTPUT_FMT_REG,
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SUN4I_FRONTEND_OUTPUT_FMT_DATA_FMT(out_fmt_val));
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return 0;
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}
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EXPORT_SYMBOL(sun4i_frontend_update_formats);
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void sun4i_frontend_update_coord(struct sun4i_frontend *frontend,
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struct drm_plane *plane)
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{
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struct drm_plane_state *state = plane->state;
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/* Set height and width */
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DRM_DEBUG_DRIVER("Frontend size W: %u H: %u\n",
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state->crtc_w, state->crtc_h);
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regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_INSIZE_REG,
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SUN4I_FRONTEND_INSIZE(state->src_h >> 16,
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state->src_w >> 16));
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regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_INSIZE_REG,
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SUN4I_FRONTEND_INSIZE(state->src_h >> 16,
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state->src_w >> 16));
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regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_OUTSIZE_REG,
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SUN4I_FRONTEND_OUTSIZE(state->crtc_h, state->crtc_w));
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regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_OUTSIZE_REG,
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SUN4I_FRONTEND_OUTSIZE(state->crtc_h, state->crtc_w));
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regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_HORZFACT_REG,
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state->src_w / state->crtc_w);
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regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_HORZFACT_REG,
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state->src_w / state->crtc_w);
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regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_VERTFACT_REG,
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state->src_h / state->crtc_h);
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regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_VERTFACT_REG,
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state->src_h / state->crtc_h);
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regmap_write_bits(frontend->regs, SUN4I_FRONTEND_FRM_CTRL_REG,
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SUN4I_FRONTEND_FRM_CTRL_REG_RDY,
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SUN4I_FRONTEND_FRM_CTRL_REG_RDY);
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}
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EXPORT_SYMBOL(sun4i_frontend_update_coord);
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int sun4i_frontend_enable(struct sun4i_frontend *frontend)
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{
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regmap_write_bits(frontend->regs, SUN4I_FRONTEND_FRM_CTRL_REG,
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SUN4I_FRONTEND_FRM_CTRL_FRM_START,
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SUN4I_FRONTEND_FRM_CTRL_FRM_START);
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return 0;
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}
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EXPORT_SYMBOL(sun4i_frontend_enable);
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static struct regmap_config sun4i_frontend_regmap_config = {
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.reg_bits = 32,
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.val_bits = 32,
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.reg_stride = 4,
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.max_register = 0x0a14,
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};
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static int sun4i_frontend_bind(struct device *dev, struct device *master,
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void *data)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct sun4i_frontend *frontend;
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struct drm_device *drm = data;
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struct sun4i_drv *drv = drm->dev_private;
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struct resource *res;
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void __iomem *regs;
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frontend = devm_kzalloc(dev, sizeof(*frontend), GFP_KERNEL);
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if (!frontend)
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return -ENOMEM;
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dev_set_drvdata(dev, frontend);
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frontend->dev = dev;
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frontend->node = dev->of_node;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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regs = devm_ioremap_resource(dev, res);
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if (IS_ERR(regs))
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return PTR_ERR(regs);
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frontend->regs = devm_regmap_init_mmio(dev, regs,
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&sun4i_frontend_regmap_config);
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if (IS_ERR(frontend->regs)) {
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dev_err(dev, "Couldn't create the frontend regmap\n");
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return PTR_ERR(frontend->regs);
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}
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frontend->reset = devm_reset_control_get(dev, NULL);
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if (IS_ERR(frontend->reset)) {
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dev_err(dev, "Couldn't get our reset line\n");
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return PTR_ERR(frontend->reset);
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}
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frontend->bus_clk = devm_clk_get(dev, "ahb");
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if (IS_ERR(frontend->bus_clk)) {
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dev_err(dev, "Couldn't get our bus clock\n");
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return PTR_ERR(frontend->bus_clk);
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}
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frontend->mod_clk = devm_clk_get(dev, "mod");
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if (IS_ERR(frontend->mod_clk)) {
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dev_err(dev, "Couldn't get our mod clock\n");
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return PTR_ERR(frontend->mod_clk);
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}
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frontend->ram_clk = devm_clk_get(dev, "ram");
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if (IS_ERR(frontend->ram_clk)) {
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dev_err(dev, "Couldn't get our ram clock\n");
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return PTR_ERR(frontend->ram_clk);
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}
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list_add_tail(&frontend->list, &drv->frontend_list);
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pm_runtime_enable(dev);
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return 0;
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}
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static void sun4i_frontend_unbind(struct device *dev, struct device *master,
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void *data)
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{
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struct sun4i_frontend *frontend = dev_get_drvdata(dev);
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list_del(&frontend->list);
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pm_runtime_force_suspend(dev);
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}
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static const struct component_ops sun4i_frontend_ops = {
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.bind = sun4i_frontend_bind,
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.unbind = sun4i_frontend_unbind,
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};
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static int sun4i_frontend_probe(struct platform_device *pdev)
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{
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return component_add(&pdev->dev, &sun4i_frontend_ops);
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}
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static int sun4i_frontend_remove(struct platform_device *pdev)
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{
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component_del(&pdev->dev, &sun4i_frontend_ops);
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return 0;
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}
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static int sun4i_frontend_runtime_resume(struct device *dev)
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{
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struct sun4i_frontend *frontend = dev_get_drvdata(dev);
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int ret;
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clk_set_rate(frontend->mod_clk, 300000000);
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clk_prepare_enable(frontend->bus_clk);
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clk_prepare_enable(frontend->mod_clk);
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clk_prepare_enable(frontend->ram_clk);
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ret = reset_control_reset(frontend->reset);
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if (ret) {
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dev_err(dev, "Couldn't reset our device\n");
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return ret;
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}
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regmap_update_bits(frontend->regs, SUN4I_FRONTEND_EN_REG,
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SUN4I_FRONTEND_EN_EN,
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SUN4I_FRONTEND_EN_EN);
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regmap_update_bits(frontend->regs, SUN4I_FRONTEND_BYPASS_REG,
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SUN4I_FRONTEND_BYPASS_CSC_EN,
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SUN4I_FRONTEND_BYPASS_CSC_EN);
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sun4i_frontend_scaler_init(frontend);
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return 0;
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}
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static int sun4i_frontend_runtime_suspend(struct device *dev)
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{
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struct sun4i_frontend *frontend = dev_get_drvdata(dev);
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clk_disable_unprepare(frontend->ram_clk);
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clk_disable_unprepare(frontend->mod_clk);
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clk_disable_unprepare(frontend->bus_clk);
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reset_control_assert(frontend->reset);
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return 0;
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}
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static const struct dev_pm_ops sun4i_frontend_pm_ops = {
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.runtime_resume = sun4i_frontend_runtime_resume,
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.runtime_suspend = sun4i_frontend_runtime_suspend,
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};
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const struct of_device_id sun4i_frontend_of_table[] = {
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{ .compatible = "allwinner,sun8i-a33-display-frontend" },
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{ }
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};
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EXPORT_SYMBOL(sun4i_frontend_of_table);
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MODULE_DEVICE_TABLE(of, sun4i_frontend_of_table);
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static struct platform_driver sun4i_frontend_driver = {
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.probe = sun4i_frontend_probe,
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.remove = sun4i_frontend_remove,
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.driver = {
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.name = "sun4i-frontend",
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.of_match_table = sun4i_frontend_of_table,
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.pm = &sun4i_frontend_pm_ops,
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},
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};
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module_platform_driver(sun4i_frontend_driver);
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MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
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MODULE_DESCRIPTION("Allwinner A10 Display Engine Frontend Driver");
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MODULE_LICENSE("GPL");
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