mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-11 16:26:46 +07:00
6aaec67da1
DMTIMER source selection on OMAP1 is broken. omap1_dm_timer_set_src()
tries to use __raw_{read,write}l() to read from and write to physical
addresses, but those functions take virtual addresses.
sparse caught this:
arch/arm/mach-omap1/timer.c:50:13: warning: incorrect type in argument 1 (different base types)
arch/arm/mach-omap1/timer.c:50:13: expected void const volatile [noderef] <asn:2>*<noident>
arch/arm/mach-omap1/timer.c:50:13: got unsigned int
arch/arm/mach-omap1/timer.c:52:9: warning: incorrect type in argument 1 (different base types)
arch/arm/mach-omap1/timer.c:52:9: expected void const volatile [noderef] <asn:2>*<noident>
arch/arm/mach-omap1/timer.c:52:9: got unsigned int
Fix by using omap_{read,writel}(), just like the other users of the
MOD_CONF_CTRL_1 register in the OMAP1 codebase. Of course, in the long term,
removing omap_{read,write}l() is the appropriate thing to do; but
this will take some work to do this cleanly.
Looks like this was caused by 97933d6
(ARM: OMAP1: dmtimer: conversion
to platform devices) that dangerously moved code and changed it in
the same patch.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Cc: stable@vger.kernel.org
[tony@atomide.com: updated comments to include the breaking commit]
Signed-off-by: Tony Lindgren <tony@atomide.com>
174 lines
4.0 KiB
C
174 lines
4.0 KiB
C
/**
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* OMAP1 Dual-Mode Timers - platform device registration
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*
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* Contains first level initialization routines which internally
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* generates timer device information and registers with linux
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* device model. It also has low level function to chnage the timer
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* input clock source.
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*
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* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
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* Tarun Kanti DebBarma <tarun.kanti@ti.com>
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* Thara Gopinath <thara@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/err.h>
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#include <linux/slab.h>
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#include <linux/platform_device.h>
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#include <mach/irqs.h>
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#include <plat/dmtimer.h>
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#define OMAP1610_GPTIMER1_BASE 0xfffb1400
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#define OMAP1610_GPTIMER2_BASE 0xfffb1c00
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#define OMAP1610_GPTIMER3_BASE 0xfffb2400
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#define OMAP1610_GPTIMER4_BASE 0xfffb2c00
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#define OMAP1610_GPTIMER5_BASE 0xfffb3400
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#define OMAP1610_GPTIMER6_BASE 0xfffb3c00
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#define OMAP1610_GPTIMER7_BASE 0xfffb7400
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#define OMAP1610_GPTIMER8_BASE 0xfffbd400
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#define OMAP1_DM_TIMER_COUNT 8
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static int omap1_dm_timer_set_src(struct platform_device *pdev,
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int source)
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{
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int n = (pdev->id - 1) << 1;
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u32 l;
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l = omap_readl(MOD_CONF_CTRL_1) & ~(0x03 << n);
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l |= source << n;
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omap_writel(l, MOD_CONF_CTRL_1);
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return 0;
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}
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int __init omap1_dm_timer_init(void)
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{
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int i;
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int ret;
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struct dmtimer_platform_data *pdata;
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struct platform_device *pdev;
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if (!cpu_is_omap16xx())
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return 0;
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for (i = 1; i <= OMAP1_DM_TIMER_COUNT; i++) {
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struct resource res[2];
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u32 base, irq;
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switch (i) {
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case 1:
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base = OMAP1610_GPTIMER1_BASE;
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irq = INT_1610_GPTIMER1;
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break;
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case 2:
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base = OMAP1610_GPTIMER2_BASE;
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irq = INT_1610_GPTIMER2;
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break;
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case 3:
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base = OMAP1610_GPTIMER3_BASE;
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irq = INT_1610_GPTIMER3;
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break;
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case 4:
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base = OMAP1610_GPTIMER4_BASE;
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irq = INT_1610_GPTIMER4;
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break;
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case 5:
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base = OMAP1610_GPTIMER5_BASE;
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irq = INT_1610_GPTIMER5;
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break;
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case 6:
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base = OMAP1610_GPTIMER6_BASE;
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irq = INT_1610_GPTIMER6;
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break;
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case 7:
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base = OMAP1610_GPTIMER7_BASE;
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irq = INT_1610_GPTIMER7;
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break;
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case 8:
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base = OMAP1610_GPTIMER8_BASE;
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irq = INT_1610_GPTIMER8;
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break;
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default:
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/*
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* not supposed to reach here.
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* this is to remove warning.
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*/
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return -EINVAL;
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}
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pdev = platform_device_alloc("omap_timer", i);
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if (!pdev) {
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pr_err("%s: Failed to device alloc for dmtimer%d\n",
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__func__, i);
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return -ENOMEM;
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}
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memset(res, 0, 2 * sizeof(struct resource));
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res[0].start = base;
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res[0].end = base + 0x46;
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res[0].flags = IORESOURCE_MEM;
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res[1].start = irq;
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res[1].end = irq;
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res[1].flags = IORESOURCE_IRQ;
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ret = platform_device_add_resources(pdev, res,
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ARRAY_SIZE(res));
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if (ret) {
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dev_err(&pdev->dev, "%s: Failed to add resources.\n",
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__func__);
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goto err_free_pdev;
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}
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pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
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if (!pdata) {
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dev_err(&pdev->dev, "%s: Failed to allocate pdata.\n",
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__func__);
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ret = -ENOMEM;
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goto err_free_pdata;
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}
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pdata->set_timer_src = omap1_dm_timer_set_src;
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pdata->needs_manual_reset = 1;
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ret = platform_device_add_data(pdev, pdata, sizeof(*pdata));
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if (ret) {
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dev_err(&pdev->dev, "%s: Failed to add platform data.\n",
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__func__);
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goto err_free_pdata;
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}
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ret = platform_device_add(pdev);
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if (ret) {
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dev_err(&pdev->dev, "%s: Failed to add platform device.\n",
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__func__);
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goto err_free_pdata;
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}
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dev_dbg(&pdev->dev, " Registered.\n");
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}
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return 0;
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err_free_pdata:
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kfree(pdata);
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err_free_pdev:
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platform_device_unregister(pdev);
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return ret;
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}
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arch_initcall(omap1_dm_timer_init);
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