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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
acaf892ecb
Many of the sh CPU-types have their own plat_irq_setup() and arch_init_clk_ops() functions, so these same (empty) functions in arch/sh/boards/of-generic.c are not needed and cause build errors. If there is some case where these empty functions are needed, they can be retained by marking them as "__weak" while at the same time making builds that do not need them succeed. Fixes these build errors: arch/sh/boards/of-generic.o: In function `plat_irq_setup': (.init.text+0x134): multiple definition of `plat_irq_setup' arch/sh/kernel/cpu/sh2/setup-sh7619.o:(.init.text+0x30): first defined here arch/sh/boards/of-generic.o: In function `arch_init_clk_ops': (.init.text+0x118): multiple definition of `arch_init_clk_ops' arch/sh/kernel/cpu/sh2/clock-sh7619.o:(.init.text+0x0): first defined here Link: http://lkml.kernel.org/r/9ee4e0c5-f100-86a2-bd4d-1d3287ceab31@infradead.org Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Reported-by: kbuild test robot <lkp@intel.com> Cc: Takashi Iwai <tiwai@suse.de> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: Rich Felker <dalias@libc.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
174 lines
3.6 KiB
C
174 lines
3.6 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* SH generic board support, using device tree
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*
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* Copyright (C) 2015-2016 Smart Energy Instruments, Inc.
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*/
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#include <linux/of.h>
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#include <linux/of_fdt.h>
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#include <linux/clocksource.h>
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#include <linux/irqchip.h>
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#include <linux/clk-provider.h>
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#include <asm/machvec.h>
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#include <asm/rtc.h>
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#ifdef CONFIG_SMP
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static void dummy_smp_setup(void)
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{
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}
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static void dummy_prepare_cpus(unsigned int max_cpus)
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{
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}
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static void dummy_start_cpu(unsigned int cpu, unsigned long entry_point)
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{
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}
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static unsigned int dummy_smp_processor_id(void)
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{
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return 0;
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}
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static void dummy_send_ipi(unsigned int cpu, unsigned int message)
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{
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}
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static struct plat_smp_ops dummy_smp_ops = {
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.smp_setup = dummy_smp_setup,
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.prepare_cpus = dummy_prepare_cpus,
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.start_cpu = dummy_start_cpu,
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.smp_processor_id = dummy_smp_processor_id,
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.send_ipi = dummy_send_ipi,
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.cpu_die = native_cpu_die,
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.cpu_disable = native_cpu_disable,
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.play_dead = native_play_dead,
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};
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extern const struct of_cpu_method __cpu_method_of_table[];
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const struct of_cpu_method __cpu_method_of_table_sentinel
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__section(__cpu_method_of_table_end);
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static void sh_of_smp_probe(void)
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{
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struct device_node *np;
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const char *method = NULL;
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const struct of_cpu_method *m = __cpu_method_of_table;
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pr_info("SH generic board support: scanning for cpus\n");
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init_cpu_possible(cpumask_of(0));
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for_each_of_cpu_node(np) {
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const __be32 *cell = of_get_property(np, "reg", NULL);
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u64 id = -1;
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if (cell) id = of_read_number(cell, of_n_addr_cells(np));
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if (id < NR_CPUS) {
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if (!method)
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of_property_read_string(np, "enable-method", &method);
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set_cpu_possible(id, true);
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set_cpu_present(id, true);
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__cpu_number_map[id] = id;
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__cpu_logical_map[id] = id;
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}
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}
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if (!method) {
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np = of_find_node_by_name(NULL, "cpus");
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of_property_read_string(np, "enable-method", &method);
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of_node_put(np);
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}
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pr_info("CPU enable method: %s\n", method);
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if (method)
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for (; m->method; m++)
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if (!strcmp(m->method, method)) {
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register_smp_ops(m->ops);
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return;
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}
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register_smp_ops(&dummy_smp_ops);
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}
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#else
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static void sh_of_smp_probe(void)
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{
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}
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#endif
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static void noop(void)
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{
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}
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static int noopi(void)
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{
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return 0;
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}
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static void __init sh_of_mem_reserve(void)
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{
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early_init_fdt_reserve_self();
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early_init_fdt_scan_reserved_mem();
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}
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static void __init sh_of_setup(char **cmdline_p)
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{
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struct device_node *root;
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sh_mv.mv_name = "Unknown SH model";
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root = of_find_node_by_path("/");
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if (root) {
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of_property_read_string(root, "model", &sh_mv.mv_name);
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of_node_put(root);
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}
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sh_of_smp_probe();
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}
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static int sh_of_irq_demux(int irq)
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{
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/* FIXME: eventually this should not be used at all;
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* the interrupt controller should set_handle_irq(). */
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return irq;
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}
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static void __init sh_of_init_irq(void)
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{
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pr_info("SH generic board support: scanning for interrupt controllers\n");
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irqchip_init();
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}
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static int __init sh_of_clk_init(void)
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{
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#ifdef CONFIG_COMMON_CLK
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/* Disabled pending move to COMMON_CLK framework. */
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pr_info("SH generic board support: scanning for clk providers\n");
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of_clk_init(NULL);
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#endif
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return 0;
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}
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static struct sh_machine_vector __initmv sh_of_generic_mv = {
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.mv_setup = sh_of_setup,
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.mv_name = "devicetree", /* replaced by DT root's model */
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.mv_irq_demux = sh_of_irq_demux,
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.mv_init_irq = sh_of_init_irq,
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.mv_clk_init = sh_of_clk_init,
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.mv_mode_pins = noopi,
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.mv_mem_init = noop,
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.mv_mem_reserve = sh_of_mem_reserve,
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};
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struct sh_clk_ops;
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void __init __weak arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
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{
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}
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void __init __weak plat_irq_setup(void)
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{
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}
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