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2e5c26ea0d
When disabling interrupts, we should only be clearing the CAUSE_ENA bit, not clearing the whole register. Clearing the whole register sets the NEXTQ_IDX field to 0 instead of 0x7ff which can confuse the Firmware in some reset sequences. Signed-off-by: Shannon Nelson <shannon.nelson@intel.com> Signed-off-by: Mitch Williams <mitch.a.williams@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> |
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e1000 | ||
e1000e | ||
fm10k | ||
i40e | ||
i40evf | ||
igb | ||
igbvf | ||
ixgb | ||
ixgbe | ||
ixgbevf | ||
e100.c | ||
Kconfig | ||
Makefile |