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878068ea27
Starting from Icelake, XMM registers can be collected in PEBS record. But current code only output the pt_regs. Add a new struct x86_perf_regs for both pt_regs and xmm_regs. The xmm_regs will be used later to keep a pointer to PEBS record which has XMM information. XMM registers are 128 bit. To simplify the code, they are handled like two different registers, which means setting two bits in the register bitmap. This also allows only sampling the lower 64bit bits in XMM. The index of XMM registers starts from 32. There are 16 XMM registers. So all reserved space for regs are used. Remove REG_RESERVED. Add PERF_REG_X86_XMM_MAX, which stands for the max number of all x86 regs including both GPRs and XMM. Add REG_NOSUPPORT for 32bit to exclude unsupported registers. Previous platforms can not collect XMM information in PEBS record. Adding pebs_no_xmm_regs to indicate the unsupported platforms. The common code still validates the supported registers. However, it cannot check model specific registers, e.g. XMM. Add extra check in x86_pmu_hw_config() to reject invalid config of regs_user and regs_intr. The regs_user never supports XMM collection. The regs_intr only supports XMM collection when sampling PEBS event on icelake and later platforms. Originally-by: Andi Kleen <ak@linux.intel.com> Suggested-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Stephane Eranian <eranian@google.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Vince Weaver <vincent.weaver@maine.edu> Cc: acme@kernel.org Cc: jolsa@kernel.org Link: https://lkml.kernel.org/r/20190402194509.2832-3-kan.liang@linux.intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
56 lines
1.3 KiB
C
56 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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#ifndef _ASM_X86_PERF_REGS_H
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#define _ASM_X86_PERF_REGS_H
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enum perf_event_x86_regs {
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PERF_REG_X86_AX,
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PERF_REG_X86_BX,
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PERF_REG_X86_CX,
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PERF_REG_X86_DX,
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PERF_REG_X86_SI,
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PERF_REG_X86_DI,
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PERF_REG_X86_BP,
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PERF_REG_X86_SP,
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PERF_REG_X86_IP,
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PERF_REG_X86_FLAGS,
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PERF_REG_X86_CS,
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PERF_REG_X86_SS,
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PERF_REG_X86_DS,
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PERF_REG_X86_ES,
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PERF_REG_X86_FS,
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PERF_REG_X86_GS,
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PERF_REG_X86_R8,
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PERF_REG_X86_R9,
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PERF_REG_X86_R10,
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PERF_REG_X86_R11,
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PERF_REG_X86_R12,
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PERF_REG_X86_R13,
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PERF_REG_X86_R14,
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PERF_REG_X86_R15,
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/* These are the limits for the GPRs. */
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PERF_REG_X86_32_MAX = PERF_REG_X86_GS + 1,
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PERF_REG_X86_64_MAX = PERF_REG_X86_R15 + 1,
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/* These all need two bits set because they are 128bit */
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PERF_REG_X86_XMM0 = 32,
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PERF_REG_X86_XMM1 = 34,
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PERF_REG_X86_XMM2 = 36,
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PERF_REG_X86_XMM3 = 38,
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PERF_REG_X86_XMM4 = 40,
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PERF_REG_X86_XMM5 = 42,
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PERF_REG_X86_XMM6 = 44,
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PERF_REG_X86_XMM7 = 46,
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PERF_REG_X86_XMM8 = 48,
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PERF_REG_X86_XMM9 = 50,
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PERF_REG_X86_XMM10 = 52,
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PERF_REG_X86_XMM11 = 54,
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PERF_REG_X86_XMM12 = 56,
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PERF_REG_X86_XMM13 = 58,
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PERF_REG_X86_XMM14 = 60,
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PERF_REG_X86_XMM15 = 62,
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/* These include both GPRs and XMMX registers */
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PERF_REG_X86_XMM_MAX = PERF_REG_X86_XMM15 + 2,
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};
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#endif /* _ASM_X86_PERF_REGS_H */
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