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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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a2f67d5ee8
The Mellanox CX4 in cxl mode uses a hybrid interrupt model, where interrupts are routed from the networking hardware to the XSL using the MSIX table, and from there will be transformed back into an MSIX interrupt using the cxl style interrupts (i.e. using IVTE entries and ranges to map a PE and AFU interrupt number to an MSIX address). We want to hide the implementation details of cxl interrupts as much as possible. To this end, we use a special version of the MSI setup & teardown routines in the PHB while in cxl mode to allocate the cxl interrupts and configure the IVTE entries in the process element. This function does not configure the MSIX table - the CX4 card uses a custom format in that table and it would not be appropriate to fill that out in generic code. The rest of the functionality is similar to the "Full MSI-X mode" described in the CAIA, and this could be easily extended to support other adapters that use that mode in the future. The interrupts will be associated with the default context. If the maximum number of interrupts per context has been limited (e.g. by the mlx5 driver), it will automatically allocate additional kernel contexts to associate extra interrupts as required. These contexts will be started using the same WED that was used to start the default context. Signed-off-by: Ian Munsie <imunsie@au1.ibm.com> Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
213 lines
4.1 KiB
C
213 lines
4.1 KiB
C
/*
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* Copyright 2014 IBM Corp.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/module.h>
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#include <linux/rcupdate.h>
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#include <asm/errno.h>
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#include <misc/cxl-base.h>
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#include <linux/of_platform.h>
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#include "cxl.h"
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/* protected by rcu */
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static struct cxl_calls *cxl_calls;
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atomic_t cxl_use_count = ATOMIC_INIT(0);
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EXPORT_SYMBOL(cxl_use_count);
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#ifdef CONFIG_CXL_MODULE
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static inline struct cxl_calls *cxl_calls_get(void)
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{
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struct cxl_calls *calls = NULL;
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rcu_read_lock();
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calls = rcu_dereference(cxl_calls);
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if (calls && !try_module_get(calls->owner))
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calls = NULL;
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rcu_read_unlock();
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return calls;
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}
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static inline void cxl_calls_put(struct cxl_calls *calls)
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{
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BUG_ON(calls != cxl_calls);
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/* we don't need to rcu this, as we hold a reference to the module */
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module_put(cxl_calls->owner);
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}
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#else /* !defined CONFIG_CXL_MODULE */
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static inline struct cxl_calls *cxl_calls_get(void)
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{
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return cxl_calls;
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}
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static inline void cxl_calls_put(struct cxl_calls *calls) { }
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#endif /* CONFIG_CXL_MODULE */
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/* AFU refcount management */
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struct cxl_afu *cxl_afu_get(struct cxl_afu *afu)
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{
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return (get_device(&afu->dev) == NULL) ? NULL : afu;
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}
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EXPORT_SYMBOL_GPL(cxl_afu_get);
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void cxl_afu_put(struct cxl_afu *afu)
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{
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put_device(&afu->dev);
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}
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EXPORT_SYMBOL_GPL(cxl_afu_put);
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void cxl_slbia(struct mm_struct *mm)
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{
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struct cxl_calls *calls;
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calls = cxl_calls_get();
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if (!calls)
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return;
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if (cxl_ctx_in_use())
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calls->cxl_slbia(mm);
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cxl_calls_put(calls);
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}
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int register_cxl_calls(struct cxl_calls *calls)
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{
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if (cxl_calls)
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return -EBUSY;
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rcu_assign_pointer(cxl_calls, calls);
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return 0;
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}
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EXPORT_SYMBOL_GPL(register_cxl_calls);
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void unregister_cxl_calls(struct cxl_calls *calls)
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{
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BUG_ON(cxl_calls->owner != calls->owner);
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RCU_INIT_POINTER(cxl_calls, NULL);
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synchronize_rcu();
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}
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EXPORT_SYMBOL_GPL(unregister_cxl_calls);
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int cxl_update_properties(struct device_node *dn,
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struct property *new_prop)
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{
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return of_update_property(dn, new_prop);
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}
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EXPORT_SYMBOL_GPL(cxl_update_properties);
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/*
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* API calls into the driver that may be called from the PHB code and must be
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* built in.
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*/
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bool cxl_pci_associate_default_context(struct pci_dev *dev, struct cxl_afu *afu)
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{
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bool ret;
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struct cxl_calls *calls;
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calls = cxl_calls_get();
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if (!calls)
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return false;
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ret = calls->cxl_pci_associate_default_context(dev, afu);
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cxl_calls_put(calls);
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return ret;
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}
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EXPORT_SYMBOL_GPL(cxl_pci_associate_default_context);
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void cxl_pci_disable_device(struct pci_dev *dev)
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{
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struct cxl_calls *calls;
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calls = cxl_calls_get();
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if (!calls)
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return;
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calls->cxl_pci_disable_device(dev);
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cxl_calls_put(calls);
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}
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EXPORT_SYMBOL_GPL(cxl_pci_disable_device);
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int cxl_next_msi_hwirq(struct pci_dev *pdev, struct cxl_context **ctx, int *afu_irq)
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{
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int ret;
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struct cxl_calls *calls;
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calls = cxl_calls_get();
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if (!calls)
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return -EBUSY;
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ret = calls->cxl_next_msi_hwirq(pdev, ctx, afu_irq);
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cxl_calls_put(calls);
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return ret;
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}
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EXPORT_SYMBOL_GPL(cxl_next_msi_hwirq);
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int cxl_cx4_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
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{
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int ret;
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struct cxl_calls *calls;
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calls = cxl_calls_get();
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if (!calls)
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return false;
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ret = calls->cxl_cx4_setup_msi_irqs(pdev, nvec, type);
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cxl_calls_put(calls);
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return ret;
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}
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EXPORT_SYMBOL_GPL(cxl_cx4_setup_msi_irqs);
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void cxl_cx4_teardown_msi_irqs(struct pci_dev *pdev)
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{
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struct cxl_calls *calls;
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calls = cxl_calls_get();
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if (!calls)
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return;
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calls->cxl_cx4_teardown_msi_irqs(pdev);
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cxl_calls_put(calls);
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}
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EXPORT_SYMBOL_GPL(cxl_cx4_teardown_msi_irqs);
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static int __init cxl_base_init(void)
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{
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struct device_node *np;
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struct platform_device *dev;
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int count = 0;
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/*
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* Scan for compatible devices in guest only
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*/
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if (cpu_has_feature(CPU_FTR_HVMODE))
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return 0;
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for_each_compatible_node(np, NULL, "ibm,coherent-platform-facility") {
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dev = of_platform_device_create(np, NULL, NULL);
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if (dev)
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count++;
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}
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pr_devel("Found %d cxl device(s)\n", count);
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return 0;
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}
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device_initcall(cxl_base_init);
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