mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-17 12:56:55 +07:00
8d6973327e
Notable changes: - Mitigations for Spectre v2 on some Freescale (NXP) CPUs. - A large series adding support for pass-through of Nvidia V100 GPUs to guests on Power9. - Another large series to enable hardware assistance for TLB table walk on MPC8xx CPUs. - Some preparatory changes to our DMA code, to make way for further cleanups from Christoph. - Several fixes for our Transactional Memory handling discovered by fuzzing the signal return path. - Support for generating our system call table(s) from a text file like other architectures. - A fix to our page fault handler so that instead of generating a WARN_ON_ONCE, user accesses of kernel addresses instead print a ratelimited and appropriately scary warning. - A cosmetic change to make our unhandled page fault messages more similar to other arches and also more compact and informative. - Freescale updates from Scott: "Highlights include elimination of legacy clock bindings use from dts files, an 83xx watchdog handler, fixes to old dts interrupt errors, and some minor cleanup." And many clean-ups, reworks and minor fixes etc. Thanks to: Alexandre Belloni, Alexey Kardashevskiy, Andrew Donnellan, Aneesh Kumar K.V, Arnd Bergmann, Benjamin Herrenschmidt, Breno Leitao, Christian Lamparter, Christophe Leroy, Christoph Hellwig, Daniel Axtens, Darren Stevens, David Gibson, Diana Craciun, Dmitry V. Levin, Firoz Khan, Geert Uytterhoeven, Greg Kurz, Gustavo Romero, Hari Bathini, Joel Stanley, Kees Cook, Madhavan Srinivasan, Mahesh Salgaonkar, Markus Elfring, Mathieu Malaterre, Michal Suchánek, Naveen N. Rao, Nick Desaulniers, Oliver O'Halloran, Paul Mackerras, Ram Pai, Ravi Bangoria, Rob Herring, Russell Currey, Sabyasachi Gupta, Sam Bobroff, Satheesh Rajendran, Scott Wood, Segher Boessenkool, Stephen Rothwell, Tang Yuantian, Thiago Jung Bauermann, Yangtao Li, Yuantian Tang, Yue Haibing. -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJcJLwZAAoJEFHr6jzI4aWAAv4P/jMvP52lA90i2E8G72LOVSF1 33DbE/Okib3VfmmMcXZpgpEfwIcEmJcIj86WWcLWzBfXLunehkgwh+AOfBLwqWch D08+RR9EZb7ppvGe91hvSgn4/28CWVKAxuDviSuoE1OK8lOTncu889r2+AxVFZiY f6Al9UPlB3FTJonNx8iO4r/GwrPigukjbzp1vkmJJg59LvNUrMQ1Fgf9D3cdlslH z4Ff9zS26RJy7cwZYQZI4sZXJZmeQ1DxOZ+6z6FL/nZp/O4WLgpw6C6o1+vxo1kE 9ZnO/3+zIRhoWiXd6OcOQXBv3NNCjJZlXh9HHAiL8m5ZqbmxrStQWGyKW/jjEZuK wVHxfUT19x9Qy1p+BH3XcUNMlxchYgcCbEi5yPX2p9ZDXD6ogNG7sT1+NO+FBTww ueCT5PCCB/xWOccQlBErFTMkFXFLtyPDNFK7BkV7uxbH0PQ+9guCvjWfBZti6wjD /6NK4mk7FpmCiK13Y1xjwC5OqabxLUYwtVuHYOMr5TOPh8URUPS4+0pIOdoYDM6z Ensrq1CC843h59MWADgFHSlZ78FRtZlG37JAXunjLbqGupLOvL7phC9lnwkylHga 2hWUWFeOV8HFQBP4gidZkLk64pkT9LzqHgdgIB4wUwrhc8r2mMZGdQTq5H7kOn3Q n9I48PWANvEC0PBCJ/KL =cr6s -----END PGP SIGNATURE----- Merge tag 'powerpc-4.21-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux Pull powerpc updates from Michael Ellerman: "Notable changes: - Mitigations for Spectre v2 on some Freescale (NXP) CPUs. - A large series adding support for pass-through of Nvidia V100 GPUs to guests on Power9. - Another large series to enable hardware assistance for TLB table walk on MPC8xx CPUs. - Some preparatory changes to our DMA code, to make way for further cleanups from Christoph. - Several fixes for our Transactional Memory handling discovered by fuzzing the signal return path. - Support for generating our system call table(s) from a text file like other architectures. - A fix to our page fault handler so that instead of generating a WARN_ON_ONCE, user accesses of kernel addresses instead print a ratelimited and appropriately scary warning. - A cosmetic change to make our unhandled page fault messages more similar to other arches and also more compact and informative. - Freescale updates from Scott: "Highlights include elimination of legacy clock bindings use from dts files, an 83xx watchdog handler, fixes to old dts interrupt errors, and some minor cleanup." And many clean-ups, reworks and minor fixes etc. Thanks to: Alexandre Belloni, Alexey Kardashevskiy, Andrew Donnellan, Aneesh Kumar K.V, Arnd Bergmann, Benjamin Herrenschmidt, Breno Leitao, Christian Lamparter, Christophe Leroy, Christoph Hellwig, Daniel Axtens, Darren Stevens, David Gibson, Diana Craciun, Dmitry V. Levin, Firoz Khan, Geert Uytterhoeven, Greg Kurz, Gustavo Romero, Hari Bathini, Joel Stanley, Kees Cook, Madhavan Srinivasan, Mahesh Salgaonkar, Markus Elfring, Mathieu Malaterre, Michal Suchánek, Naveen N. Rao, Nick Desaulniers, Oliver O'Halloran, Paul Mackerras, Ram Pai, Ravi Bangoria, Rob Herring, Russell Currey, Sabyasachi Gupta, Sam Bobroff, Satheesh Rajendran, Scott Wood, Segher Boessenkool, Stephen Rothwell, Tang Yuantian, Thiago Jung Bauermann, Yangtao Li, Yuantian Tang, Yue Haibing" * tag 'powerpc-4.21-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: (201 commits) Revert "powerpc/fsl_pci: simplify fsl_pci_dma_set_mask" powerpc/zImage: Also check for stdout-path powerpc: Fix HMIs on big-endian with CONFIG_RELOCATABLE=y macintosh: Use of_node_name_{eq, prefix} for node name comparisons ide: Use of_node_name_eq for node name comparisons powerpc: Use of_node_name_eq for node name comparisons powerpc/pseries/pmem: Convert to %pOFn instead of device_node.name powerpc/mm: Remove very old comment in hash-4k.h powerpc/pseries: Fix node leak in update_lmb_associativity_index() powerpc/configs/85xx: Enable CONFIG_DEBUG_KERNEL powerpc/dts/fsl: Fix dtc-flagged interrupt errors clk: qoriq: add more compatibles strings powerpc/fsl: Use new clockgen binding powerpc/83xx: handle machine check caused by watchdog timer powerpc/fsl-rio: fix spelling mistake "reserverd" -> "reserved" powerpc/fsl_pci: simplify fsl_pci_dma_set_mask arch/powerpc/fsl_rmu: Use dma_zalloc_coherent vfio_pci: Add NVIDIA GV100GL [Tesla V100 SXM2] subdriver vfio_pci: Allow regions to add own capabilities vfio_pci: Allow mapping extra regions ...
911 lines
22 KiB
C
911 lines
22 KiB
C
/*
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* PPC Huge TLB Page Support for Kernel.
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*
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* Copyright (C) 2003 David Gibson, IBM Corporation.
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* Copyright (C) 2011 Becky Bruce, Freescale Semiconductor
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*
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* Based on the IA-32 version:
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* Copyright (C) 2002, Rohit Seth <rohit.seth@intel.com>
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*/
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#include <linux/mm.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <linux/hugetlb.h>
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#include <linux/export.h>
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#include <linux/of_fdt.h>
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#include <linux/memblock.h>
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#include <linux/moduleparam.h>
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#include <linux/swap.h>
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#include <linux/swapops.h>
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#include <linux/kmemleak.h>
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#include <asm/pgtable.h>
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#include <asm/pgalloc.h>
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#include <asm/tlb.h>
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#include <asm/setup.h>
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#include <asm/hugetlb.h>
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#include <asm/pte-walk.h>
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#ifdef CONFIG_HUGETLB_PAGE
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#define PAGE_SHIFT_64K 16
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#define PAGE_SHIFT_512K 19
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#define PAGE_SHIFT_8M 23
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#define PAGE_SHIFT_16M 24
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#define PAGE_SHIFT_16G 34
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bool hugetlb_disabled = false;
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unsigned int HPAGE_SHIFT;
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EXPORT_SYMBOL(HPAGE_SHIFT);
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#define hugepd_none(hpd) (hpd_val(hpd) == 0)
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#define PTE_T_ORDER (__builtin_ffs(sizeof(pte_t)) - __builtin_ffs(sizeof(void *)))
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pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr, unsigned long sz)
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{
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/*
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* Only called for hugetlbfs pages, hence can ignore THP and the
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* irq disabled walk.
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*/
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return __find_linux_pte(mm->pgd, addr, NULL, NULL);
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}
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static int __hugepte_alloc(struct mm_struct *mm, hugepd_t *hpdp,
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unsigned long address, unsigned int pdshift,
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unsigned int pshift, spinlock_t *ptl)
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{
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struct kmem_cache *cachep;
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pte_t *new;
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int i;
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int num_hugepd;
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if (pshift >= pdshift) {
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cachep = PGT_CACHE(PTE_T_ORDER);
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num_hugepd = 1 << (pshift - pdshift);
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} else if (IS_ENABLED(CONFIG_PPC_8xx)) {
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cachep = PGT_CACHE(PTE_INDEX_SIZE);
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num_hugepd = 1;
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} else {
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cachep = PGT_CACHE(pdshift - pshift);
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num_hugepd = 1;
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}
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new = kmem_cache_alloc(cachep, pgtable_gfp_flags(mm, GFP_KERNEL));
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BUG_ON(pshift > HUGEPD_SHIFT_MASK);
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BUG_ON((unsigned long)new & HUGEPD_SHIFT_MASK);
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if (! new)
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return -ENOMEM;
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/*
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* Make sure other cpus find the hugepd set only after a
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* properly initialized page table is visible to them.
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* For more details look for comment in __pte_alloc().
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*/
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smp_wmb();
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spin_lock(ptl);
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/*
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* We have multiple higher-level entries that point to the same
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* actual pte location. Fill in each as we go and backtrack on error.
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* We need all of these so the DTLB pgtable walk code can find the
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* right higher-level entry without knowing if it's a hugepage or not.
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*/
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for (i = 0; i < num_hugepd; i++, hpdp++) {
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if (unlikely(!hugepd_none(*hpdp)))
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break;
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else {
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#ifdef CONFIG_PPC_BOOK3S_64
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*hpdp = __hugepd(__pa(new) | HUGEPD_VAL_BITS |
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(shift_to_mmu_psize(pshift) << 2));
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#elif defined(CONFIG_PPC_8xx)
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*hpdp = __hugepd(__pa(new) | _PMD_USER |
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(pshift == PAGE_SHIFT_8M ? _PMD_PAGE_8M :
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_PMD_PAGE_512K) | _PMD_PRESENT);
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#else
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/* We use the old format for PPC_FSL_BOOK3E */
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*hpdp = __hugepd(((unsigned long)new & ~PD_HUGE) | pshift);
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#endif
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}
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}
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/* If we bailed from the for loop early, an error occurred, clean up */
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if (i < num_hugepd) {
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for (i = i - 1 ; i >= 0; i--, hpdp--)
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*hpdp = __hugepd(0);
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kmem_cache_free(cachep, new);
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} else {
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kmemleak_ignore(new);
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}
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spin_unlock(ptl);
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return 0;
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}
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/*
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* At this point we do the placement change only for BOOK3S 64. This would
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* possibly work on other subarchs.
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*/
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pte_t *huge_pte_alloc(struct mm_struct *mm, unsigned long addr, unsigned long sz)
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{
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pgd_t *pg;
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pud_t *pu;
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pmd_t *pm;
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hugepd_t *hpdp = NULL;
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unsigned pshift = __ffs(sz);
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unsigned pdshift = PGDIR_SHIFT;
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spinlock_t *ptl;
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addr &= ~(sz-1);
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pg = pgd_offset(mm, addr);
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#ifdef CONFIG_PPC_BOOK3S_64
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if (pshift == PGDIR_SHIFT)
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/* 16GB huge page */
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return (pte_t *) pg;
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else if (pshift > PUD_SHIFT) {
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/*
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* We need to use hugepd table
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*/
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ptl = &mm->page_table_lock;
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hpdp = (hugepd_t *)pg;
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} else {
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pdshift = PUD_SHIFT;
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pu = pud_alloc(mm, pg, addr);
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if (pshift == PUD_SHIFT)
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return (pte_t *)pu;
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else if (pshift > PMD_SHIFT) {
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ptl = pud_lockptr(mm, pu);
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hpdp = (hugepd_t *)pu;
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} else {
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pdshift = PMD_SHIFT;
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pm = pmd_alloc(mm, pu, addr);
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if (pshift == PMD_SHIFT)
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/* 16MB hugepage */
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return (pte_t *)pm;
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else {
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ptl = pmd_lockptr(mm, pm);
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hpdp = (hugepd_t *)pm;
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}
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}
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}
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#else
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if (pshift >= PGDIR_SHIFT) {
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ptl = &mm->page_table_lock;
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hpdp = (hugepd_t *)pg;
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} else {
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pdshift = PUD_SHIFT;
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pu = pud_alloc(mm, pg, addr);
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if (pshift >= PUD_SHIFT) {
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ptl = pud_lockptr(mm, pu);
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hpdp = (hugepd_t *)pu;
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} else {
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pdshift = PMD_SHIFT;
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pm = pmd_alloc(mm, pu, addr);
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ptl = pmd_lockptr(mm, pm);
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hpdp = (hugepd_t *)pm;
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}
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}
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#endif
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if (!hpdp)
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return NULL;
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BUG_ON(!hugepd_none(*hpdp) && !hugepd_ok(*hpdp));
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if (hugepd_none(*hpdp) && __hugepte_alloc(mm, hpdp, addr,
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pdshift, pshift, ptl))
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return NULL;
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return hugepte_offset(*hpdp, addr, pdshift);
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}
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#ifdef CONFIG_PPC_BOOK3S_64
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/*
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* Tracks gpages after the device tree is scanned and before the
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* huge_boot_pages list is ready on pseries.
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*/
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#define MAX_NUMBER_GPAGES 1024
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__initdata static u64 gpage_freearray[MAX_NUMBER_GPAGES];
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__initdata static unsigned nr_gpages;
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/*
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* Build list of addresses of gigantic pages. This function is used in early
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* boot before the buddy allocator is setup.
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*/
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void __init pseries_add_gpage(u64 addr, u64 page_size, unsigned long number_of_pages)
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{
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if (!addr)
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return;
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while (number_of_pages > 0) {
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gpage_freearray[nr_gpages] = addr;
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nr_gpages++;
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number_of_pages--;
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addr += page_size;
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}
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}
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int __init pseries_alloc_bootmem_huge_page(struct hstate *hstate)
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{
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struct huge_bootmem_page *m;
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if (nr_gpages == 0)
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return 0;
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m = phys_to_virt(gpage_freearray[--nr_gpages]);
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gpage_freearray[nr_gpages] = 0;
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list_add(&m->list, &huge_boot_pages);
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m->hstate = hstate;
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return 1;
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}
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#endif
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int __init alloc_bootmem_huge_page(struct hstate *h)
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{
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#ifdef CONFIG_PPC_BOOK3S_64
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if (firmware_has_feature(FW_FEATURE_LPAR) && !radix_enabled())
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return pseries_alloc_bootmem_huge_page(h);
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#endif
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return __alloc_bootmem_huge_page(h);
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}
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#if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_8xx)
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#define HUGEPD_FREELIST_SIZE \
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((PAGE_SIZE - sizeof(struct hugepd_freelist)) / sizeof(pte_t))
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struct hugepd_freelist {
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struct rcu_head rcu;
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unsigned int index;
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void *ptes[0];
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};
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static DEFINE_PER_CPU(struct hugepd_freelist *, hugepd_freelist_cur);
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static void hugepd_free_rcu_callback(struct rcu_head *head)
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{
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struct hugepd_freelist *batch =
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container_of(head, struct hugepd_freelist, rcu);
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unsigned int i;
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for (i = 0; i < batch->index; i++)
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kmem_cache_free(PGT_CACHE(PTE_T_ORDER), batch->ptes[i]);
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free_page((unsigned long)batch);
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}
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static void hugepd_free(struct mmu_gather *tlb, void *hugepte)
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{
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struct hugepd_freelist **batchp;
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batchp = &get_cpu_var(hugepd_freelist_cur);
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if (atomic_read(&tlb->mm->mm_users) < 2 ||
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mm_is_thread_local(tlb->mm)) {
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kmem_cache_free(PGT_CACHE(PTE_T_ORDER), hugepte);
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put_cpu_var(hugepd_freelist_cur);
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return;
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}
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if (*batchp == NULL) {
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*batchp = (struct hugepd_freelist *)__get_free_page(GFP_ATOMIC);
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(*batchp)->index = 0;
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}
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(*batchp)->ptes[(*batchp)->index++] = hugepte;
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if ((*batchp)->index == HUGEPD_FREELIST_SIZE) {
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call_rcu(&(*batchp)->rcu, hugepd_free_rcu_callback);
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*batchp = NULL;
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}
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put_cpu_var(hugepd_freelist_cur);
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}
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#else
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static inline void hugepd_free(struct mmu_gather *tlb, void *hugepte) {}
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#endif
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static void free_hugepd_range(struct mmu_gather *tlb, hugepd_t *hpdp, int pdshift,
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unsigned long start, unsigned long end,
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unsigned long floor, unsigned long ceiling)
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{
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pte_t *hugepte = hugepd_page(*hpdp);
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int i;
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unsigned long pdmask = ~((1UL << pdshift) - 1);
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unsigned int num_hugepd = 1;
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unsigned int shift = hugepd_shift(*hpdp);
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/* Note: On fsl the hpdp may be the first of several */
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if (shift > pdshift)
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num_hugepd = 1 << (shift - pdshift);
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start &= pdmask;
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if (start < floor)
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return;
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if (ceiling) {
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ceiling &= pdmask;
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if (! ceiling)
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return;
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}
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if (end - 1 > ceiling - 1)
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return;
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for (i = 0; i < num_hugepd; i++, hpdp++)
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*hpdp = __hugepd(0);
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if (shift >= pdshift)
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hugepd_free(tlb, hugepte);
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else if (IS_ENABLED(CONFIG_PPC_8xx))
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pgtable_free_tlb(tlb, hugepte,
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get_hugepd_cache_index(PTE_INDEX_SIZE));
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else
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pgtable_free_tlb(tlb, hugepte,
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get_hugepd_cache_index(pdshift - shift));
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}
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static void hugetlb_free_pmd_range(struct mmu_gather *tlb, pud_t *pud,
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unsigned long addr, unsigned long end,
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unsigned long floor, unsigned long ceiling)
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{
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pmd_t *pmd;
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unsigned long next;
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unsigned long start;
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start = addr;
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do {
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unsigned long more;
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pmd = pmd_offset(pud, addr);
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next = pmd_addr_end(addr, end);
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if (!is_hugepd(__hugepd(pmd_val(*pmd)))) {
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/*
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* if it is not hugepd pointer, we should already find
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* it cleared.
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*/
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WARN_ON(!pmd_none_or_clear_bad(pmd));
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continue;
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}
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/*
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* Increment next by the size of the huge mapping since
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* there may be more than one entry at this level for a
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* single hugepage, but all of them point to
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* the same kmem cache that holds the hugepte.
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*/
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more = addr + (1 << hugepd_shift(*(hugepd_t *)pmd));
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if (more > next)
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next = more;
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|
|
free_hugepd_range(tlb, (hugepd_t *)pmd, PMD_SHIFT,
|
|
addr, next, floor, ceiling);
|
|
} while (addr = next, addr != end);
|
|
|
|
start &= PUD_MASK;
|
|
if (start < floor)
|
|
return;
|
|
if (ceiling) {
|
|
ceiling &= PUD_MASK;
|
|
if (!ceiling)
|
|
return;
|
|
}
|
|
if (end - 1 > ceiling - 1)
|
|
return;
|
|
|
|
pmd = pmd_offset(pud, start);
|
|
pud_clear(pud);
|
|
pmd_free_tlb(tlb, pmd, start);
|
|
mm_dec_nr_pmds(tlb->mm);
|
|
}
|
|
|
|
static void hugetlb_free_pud_range(struct mmu_gather *tlb, pgd_t *pgd,
|
|
unsigned long addr, unsigned long end,
|
|
unsigned long floor, unsigned long ceiling)
|
|
{
|
|
pud_t *pud;
|
|
unsigned long next;
|
|
unsigned long start;
|
|
|
|
start = addr;
|
|
do {
|
|
pud = pud_offset(pgd, addr);
|
|
next = pud_addr_end(addr, end);
|
|
if (!is_hugepd(__hugepd(pud_val(*pud)))) {
|
|
if (pud_none_or_clear_bad(pud))
|
|
continue;
|
|
hugetlb_free_pmd_range(tlb, pud, addr, next, floor,
|
|
ceiling);
|
|
} else {
|
|
unsigned long more;
|
|
/*
|
|
* Increment next by the size of the huge mapping since
|
|
* there may be more than one entry at this level for a
|
|
* single hugepage, but all of them point to
|
|
* the same kmem cache that holds the hugepte.
|
|
*/
|
|
more = addr + (1 << hugepd_shift(*(hugepd_t *)pud));
|
|
if (more > next)
|
|
next = more;
|
|
|
|
free_hugepd_range(tlb, (hugepd_t *)pud, PUD_SHIFT,
|
|
addr, next, floor, ceiling);
|
|
}
|
|
} while (addr = next, addr != end);
|
|
|
|
start &= PGDIR_MASK;
|
|
if (start < floor)
|
|
return;
|
|
if (ceiling) {
|
|
ceiling &= PGDIR_MASK;
|
|
if (!ceiling)
|
|
return;
|
|
}
|
|
if (end - 1 > ceiling - 1)
|
|
return;
|
|
|
|
pud = pud_offset(pgd, start);
|
|
pgd_clear(pgd);
|
|
pud_free_tlb(tlb, pud, start);
|
|
mm_dec_nr_puds(tlb->mm);
|
|
}
|
|
|
|
/*
|
|
* This function frees user-level page tables of a process.
|
|
*/
|
|
void hugetlb_free_pgd_range(struct mmu_gather *tlb,
|
|
unsigned long addr, unsigned long end,
|
|
unsigned long floor, unsigned long ceiling)
|
|
{
|
|
pgd_t *pgd;
|
|
unsigned long next;
|
|
|
|
/*
|
|
* Because there are a number of different possible pagetable
|
|
* layouts for hugepage ranges, we limit knowledge of how
|
|
* things should be laid out to the allocation path
|
|
* (huge_pte_alloc(), above). Everything else works out the
|
|
* structure as it goes from information in the hugepd
|
|
* pointers. That means that we can't here use the
|
|
* optimization used in the normal page free_pgd_range(), of
|
|
* checking whether we're actually covering a large enough
|
|
* range to have to do anything at the top level of the walk
|
|
* instead of at the bottom.
|
|
*
|
|
* To make sense of this, you should probably go read the big
|
|
* block comment at the top of the normal free_pgd_range(),
|
|
* too.
|
|
*/
|
|
|
|
do {
|
|
next = pgd_addr_end(addr, end);
|
|
pgd = pgd_offset(tlb->mm, addr);
|
|
if (!is_hugepd(__hugepd(pgd_val(*pgd)))) {
|
|
if (pgd_none_or_clear_bad(pgd))
|
|
continue;
|
|
hugetlb_free_pud_range(tlb, pgd, addr, next, floor, ceiling);
|
|
} else {
|
|
unsigned long more;
|
|
/*
|
|
* Increment next by the size of the huge mapping since
|
|
* there may be more than one entry at the pgd level
|
|
* for a single hugepage, but all of them point to the
|
|
* same kmem cache that holds the hugepte.
|
|
*/
|
|
more = addr + (1 << hugepd_shift(*(hugepd_t *)pgd));
|
|
if (more > next)
|
|
next = more;
|
|
|
|
free_hugepd_range(tlb, (hugepd_t *)pgd, PGDIR_SHIFT,
|
|
addr, next, floor, ceiling);
|
|
}
|
|
} while (addr = next, addr != end);
|
|
}
|
|
|
|
struct page *follow_huge_pd(struct vm_area_struct *vma,
|
|
unsigned long address, hugepd_t hpd,
|
|
int flags, int pdshift)
|
|
{
|
|
pte_t *ptep;
|
|
spinlock_t *ptl;
|
|
struct page *page = NULL;
|
|
unsigned long mask;
|
|
int shift = hugepd_shift(hpd);
|
|
struct mm_struct *mm = vma->vm_mm;
|
|
|
|
retry:
|
|
/*
|
|
* hugepage directory entries are protected by mm->page_table_lock
|
|
* Use this instead of huge_pte_lockptr
|
|
*/
|
|
ptl = &mm->page_table_lock;
|
|
spin_lock(ptl);
|
|
|
|
ptep = hugepte_offset(hpd, address, pdshift);
|
|
if (pte_present(*ptep)) {
|
|
mask = (1UL << shift) - 1;
|
|
page = pte_page(*ptep);
|
|
page += ((address & mask) >> PAGE_SHIFT);
|
|
if (flags & FOLL_GET)
|
|
get_page(page);
|
|
} else {
|
|
if (is_hugetlb_entry_migration(*ptep)) {
|
|
spin_unlock(ptl);
|
|
__migration_entry_wait(mm, ptep, ptl);
|
|
goto retry;
|
|
}
|
|
}
|
|
spin_unlock(ptl);
|
|
return page;
|
|
}
|
|
|
|
static unsigned long hugepte_addr_end(unsigned long addr, unsigned long end,
|
|
unsigned long sz)
|
|
{
|
|
unsigned long __boundary = (addr + sz) & ~(sz-1);
|
|
return (__boundary - 1 < end - 1) ? __boundary : end;
|
|
}
|
|
|
|
int gup_huge_pd(hugepd_t hugepd, unsigned long addr, unsigned pdshift,
|
|
unsigned long end, int write, struct page **pages, int *nr)
|
|
{
|
|
pte_t *ptep;
|
|
unsigned long sz = 1UL << hugepd_shift(hugepd);
|
|
unsigned long next;
|
|
|
|
ptep = hugepte_offset(hugepd, addr, pdshift);
|
|
do {
|
|
next = hugepte_addr_end(addr, end, sz);
|
|
if (!gup_hugepte(ptep, sz, addr, end, write, pages, nr))
|
|
return 0;
|
|
} while (ptep++, addr = next, addr != end);
|
|
|
|
return 1;
|
|
}
|
|
|
|
#ifdef CONFIG_PPC_MM_SLICES
|
|
unsigned long hugetlb_get_unmapped_area(struct file *file, unsigned long addr,
|
|
unsigned long len, unsigned long pgoff,
|
|
unsigned long flags)
|
|
{
|
|
struct hstate *hstate = hstate_file(file);
|
|
int mmu_psize = shift_to_mmu_psize(huge_page_shift(hstate));
|
|
|
|
#ifdef CONFIG_PPC_RADIX_MMU
|
|
if (radix_enabled())
|
|
return radix__hugetlb_get_unmapped_area(file, addr, len,
|
|
pgoff, flags);
|
|
#endif
|
|
return slice_get_unmapped_area(addr, len, flags, mmu_psize, 1);
|
|
}
|
|
#endif
|
|
|
|
unsigned long vma_mmu_pagesize(struct vm_area_struct *vma)
|
|
{
|
|
#ifdef CONFIG_PPC_MM_SLICES
|
|
/* With radix we don't use slice, so derive it from vma*/
|
|
if (!radix_enabled()) {
|
|
unsigned int psize = get_slice_psize(vma->vm_mm, vma->vm_start);
|
|
|
|
return 1UL << mmu_psize_to_shift(psize);
|
|
}
|
|
#endif
|
|
return vma_kernel_pagesize(vma);
|
|
}
|
|
|
|
static inline bool is_power_of_4(unsigned long x)
|
|
{
|
|
if (is_power_of_2(x))
|
|
return (__ilog2(x) % 2) ? false : true;
|
|
return false;
|
|
}
|
|
|
|
static int __init add_huge_page_size(unsigned long long size)
|
|
{
|
|
int shift = __ffs(size);
|
|
int mmu_psize;
|
|
|
|
/* Check that it is a page size supported by the hardware and
|
|
* that it fits within pagetable and slice limits. */
|
|
if (size <= PAGE_SIZE)
|
|
return -EINVAL;
|
|
#if defined(CONFIG_PPC_FSL_BOOK3E)
|
|
if (!is_power_of_4(size))
|
|
return -EINVAL;
|
|
#elif !defined(CONFIG_PPC_8xx)
|
|
if (!is_power_of_2(size) || (shift > SLICE_HIGH_SHIFT))
|
|
return -EINVAL;
|
|
#endif
|
|
|
|
if ((mmu_psize = shift_to_mmu_psize(shift)) < 0)
|
|
return -EINVAL;
|
|
|
|
#ifdef CONFIG_PPC_BOOK3S_64
|
|
/*
|
|
* We need to make sure that for different page sizes reported by
|
|
* firmware we only add hugetlb support for page sizes that can be
|
|
* supported by linux page table layout.
|
|
* For now we have
|
|
* Radix: 2M and 1G
|
|
* Hash: 16M and 16G
|
|
*/
|
|
if (radix_enabled()) {
|
|
if (mmu_psize != MMU_PAGE_2M && mmu_psize != MMU_PAGE_1G)
|
|
return -EINVAL;
|
|
} else {
|
|
if (mmu_psize != MMU_PAGE_16M && mmu_psize != MMU_PAGE_16G)
|
|
return -EINVAL;
|
|
}
|
|
#endif
|
|
|
|
BUG_ON(mmu_psize_defs[mmu_psize].shift != shift);
|
|
|
|
/* Return if huge page size has already been setup */
|
|
if (size_to_hstate(size))
|
|
return 0;
|
|
|
|
hugetlb_add_hstate(shift - PAGE_SHIFT);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int __init hugepage_setup_sz(char *str)
|
|
{
|
|
unsigned long long size;
|
|
|
|
size = memparse(str, &str);
|
|
|
|
if (add_huge_page_size(size) != 0) {
|
|
hugetlb_bad_size();
|
|
pr_err("Invalid huge page size specified(%llu)\n", size);
|
|
}
|
|
|
|
return 1;
|
|
}
|
|
__setup("hugepagesz=", hugepage_setup_sz);
|
|
|
|
static int __init hugetlbpage_init(void)
|
|
{
|
|
int psize;
|
|
|
|
if (hugetlb_disabled) {
|
|
pr_info("HugeTLB support is disabled!\n");
|
|
return 0;
|
|
}
|
|
|
|
#if !defined(CONFIG_PPC_FSL_BOOK3E) && !defined(CONFIG_PPC_8xx)
|
|
if (!radix_enabled() && !mmu_has_feature(MMU_FTR_16M_PAGE))
|
|
return -ENODEV;
|
|
#endif
|
|
for (psize = 0; psize < MMU_PAGE_COUNT; ++psize) {
|
|
unsigned shift;
|
|
unsigned pdshift;
|
|
|
|
if (!mmu_psize_defs[psize].shift)
|
|
continue;
|
|
|
|
shift = mmu_psize_to_shift(psize);
|
|
|
|
#ifdef CONFIG_PPC_BOOK3S_64
|
|
if (shift > PGDIR_SHIFT)
|
|
continue;
|
|
else if (shift > PUD_SHIFT)
|
|
pdshift = PGDIR_SHIFT;
|
|
else if (shift > PMD_SHIFT)
|
|
pdshift = PUD_SHIFT;
|
|
else
|
|
pdshift = PMD_SHIFT;
|
|
#else
|
|
if (shift < PUD_SHIFT)
|
|
pdshift = PMD_SHIFT;
|
|
else if (shift < PGDIR_SHIFT)
|
|
pdshift = PUD_SHIFT;
|
|
else
|
|
pdshift = PGDIR_SHIFT;
|
|
#endif
|
|
|
|
if (add_huge_page_size(1ULL << shift) < 0)
|
|
continue;
|
|
/*
|
|
* if we have pdshift and shift value same, we don't
|
|
* use pgt cache for hugepd.
|
|
*/
|
|
if (pdshift > shift && IS_ENABLED(CONFIG_PPC_8xx))
|
|
pgtable_cache_add(PTE_INDEX_SIZE);
|
|
else if (pdshift > shift)
|
|
pgtable_cache_add(pdshift - shift);
|
|
#if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_8xx)
|
|
else
|
|
pgtable_cache_add(PTE_T_ORDER);
|
|
#endif
|
|
}
|
|
|
|
#if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_8xx)
|
|
/* Default hpage size = 4M on FSL_BOOK3E and 512k on 8xx */
|
|
if (mmu_psize_defs[MMU_PAGE_4M].shift)
|
|
HPAGE_SHIFT = mmu_psize_defs[MMU_PAGE_4M].shift;
|
|
else if (mmu_psize_defs[MMU_PAGE_512K].shift)
|
|
HPAGE_SHIFT = mmu_psize_defs[MMU_PAGE_512K].shift;
|
|
#else
|
|
/* Set default large page size. Currently, we pick 16M or 1M
|
|
* depending on what is available
|
|
*/
|
|
if (mmu_psize_defs[MMU_PAGE_16M].shift)
|
|
HPAGE_SHIFT = mmu_psize_defs[MMU_PAGE_16M].shift;
|
|
else if (mmu_psize_defs[MMU_PAGE_1M].shift)
|
|
HPAGE_SHIFT = mmu_psize_defs[MMU_PAGE_1M].shift;
|
|
else if (mmu_psize_defs[MMU_PAGE_2M].shift)
|
|
HPAGE_SHIFT = mmu_psize_defs[MMU_PAGE_2M].shift;
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
arch_initcall(hugetlbpage_init);
|
|
|
|
void flush_dcache_icache_hugepage(struct page *page)
|
|
{
|
|
int i;
|
|
void *start;
|
|
|
|
BUG_ON(!PageCompound(page));
|
|
|
|
for (i = 0; i < (1UL << compound_order(page)); i++) {
|
|
if (!PageHighMem(page)) {
|
|
__flush_dcache_icache(page_address(page+i));
|
|
} else {
|
|
start = kmap_atomic(page+i);
|
|
__flush_dcache_icache(start);
|
|
kunmap_atomic(start);
|
|
}
|
|
}
|
|
}
|
|
|
|
#endif /* CONFIG_HUGETLB_PAGE */
|
|
|
|
/*
|
|
* We have 4 cases for pgds and pmds:
|
|
* (1) invalid (all zeroes)
|
|
* (2) pointer to next table, as normal; bottom 6 bits == 0
|
|
* (3) leaf pte for huge page _PAGE_PTE set
|
|
* (4) hugepd pointer, _PAGE_PTE = 0 and bits [2..6] indicate size of table
|
|
*
|
|
* So long as we atomically load page table pointers we are safe against teardown,
|
|
* we can follow the address down to the the page and take a ref on it.
|
|
* This function need to be called with interrupts disabled. We use this variant
|
|
* when we have MSR[EE] = 0 but the paca->irq_soft_mask = IRQS_ENABLED
|
|
*/
|
|
pte_t *__find_linux_pte(pgd_t *pgdir, unsigned long ea,
|
|
bool *is_thp, unsigned *hpage_shift)
|
|
{
|
|
pgd_t pgd, *pgdp;
|
|
pud_t pud, *pudp;
|
|
pmd_t pmd, *pmdp;
|
|
pte_t *ret_pte;
|
|
hugepd_t *hpdp = NULL;
|
|
unsigned pdshift = PGDIR_SHIFT;
|
|
|
|
if (hpage_shift)
|
|
*hpage_shift = 0;
|
|
|
|
if (is_thp)
|
|
*is_thp = false;
|
|
|
|
pgdp = pgdir + pgd_index(ea);
|
|
pgd = READ_ONCE(*pgdp);
|
|
/*
|
|
* Always operate on the local stack value. This make sure the
|
|
* value don't get updated by a parallel THP split/collapse,
|
|
* page fault or a page unmap. The return pte_t * is still not
|
|
* stable. So should be checked there for above conditions.
|
|
*/
|
|
if (pgd_none(pgd))
|
|
return NULL;
|
|
else if (pgd_huge(pgd)) {
|
|
ret_pte = (pte_t *) pgdp;
|
|
goto out;
|
|
} else if (is_hugepd(__hugepd(pgd_val(pgd))))
|
|
hpdp = (hugepd_t *)&pgd;
|
|
else {
|
|
/*
|
|
* Even if we end up with an unmap, the pgtable will not
|
|
* be freed, because we do an rcu free and here we are
|
|
* irq disabled
|
|
*/
|
|
pdshift = PUD_SHIFT;
|
|
pudp = pud_offset(&pgd, ea);
|
|
pud = READ_ONCE(*pudp);
|
|
|
|
if (pud_none(pud))
|
|
return NULL;
|
|
else if (pud_huge(pud)) {
|
|
ret_pte = (pte_t *) pudp;
|
|
goto out;
|
|
} else if (is_hugepd(__hugepd(pud_val(pud))))
|
|
hpdp = (hugepd_t *)&pud;
|
|
else {
|
|
pdshift = PMD_SHIFT;
|
|
pmdp = pmd_offset(&pud, ea);
|
|
pmd = READ_ONCE(*pmdp);
|
|
/*
|
|
* A hugepage collapse is captured by pmd_none, because
|
|
* it mark the pmd none and do a hpte invalidate.
|
|
*/
|
|
if (pmd_none(pmd))
|
|
return NULL;
|
|
|
|
if (pmd_trans_huge(pmd) || pmd_devmap(pmd)) {
|
|
if (is_thp)
|
|
*is_thp = true;
|
|
ret_pte = (pte_t *) pmdp;
|
|
goto out;
|
|
}
|
|
/*
|
|
* pmd_large check below will handle the swap pmd pte
|
|
* we need to do both the check because they are config
|
|
* dependent.
|
|
*/
|
|
if (pmd_huge(pmd) || pmd_large(pmd)) {
|
|
ret_pte = (pte_t *) pmdp;
|
|
goto out;
|
|
} else if (is_hugepd(__hugepd(pmd_val(pmd))))
|
|
hpdp = (hugepd_t *)&pmd;
|
|
else
|
|
return pte_offset_kernel(&pmd, ea);
|
|
}
|
|
}
|
|
if (!hpdp)
|
|
return NULL;
|
|
|
|
ret_pte = hugepte_offset(*hpdp, ea, pdshift);
|
|
pdshift = hugepd_shift(*hpdp);
|
|
out:
|
|
if (hpage_shift)
|
|
*hpage_shift = pdshift;
|
|
return ret_pte;
|
|
}
|
|
EXPORT_SYMBOL_GPL(__find_linux_pte);
|
|
|
|
int gup_hugepte(pte_t *ptep, unsigned long sz, unsigned long addr,
|
|
unsigned long end, int write, struct page **pages, int *nr)
|
|
{
|
|
unsigned long pte_end;
|
|
struct page *head, *page;
|
|
pte_t pte;
|
|
int refs;
|
|
|
|
pte_end = (addr + sz) & ~(sz-1);
|
|
if (pte_end < end)
|
|
end = pte_end;
|
|
|
|
pte = READ_ONCE(*ptep);
|
|
|
|
if (!pte_access_permitted(pte, write))
|
|
return 0;
|
|
|
|
/* hugepages are never "special" */
|
|
VM_BUG_ON(!pfn_valid(pte_pfn(pte)));
|
|
|
|
refs = 0;
|
|
head = pte_page(pte);
|
|
|
|
page = head + ((addr & (sz-1)) >> PAGE_SHIFT);
|
|
do {
|
|
VM_BUG_ON(compound_head(page) != head);
|
|
pages[*nr] = page;
|
|
(*nr)++;
|
|
page++;
|
|
refs++;
|
|
} while (addr += PAGE_SIZE, addr != end);
|
|
|
|
if (!page_cache_add_speculative(head, refs)) {
|
|
*nr -= refs;
|
|
return 0;
|
|
}
|
|
|
|
if (unlikely(pte_val(pte) != pte_val(*ptep))) {
|
|
/* Could be optimized better */
|
|
*nr -= refs;
|
|
while (refs--)
|
|
put_page(head);
|
|
return 0;
|
|
}
|
|
|
|
return 1;
|
|
}
|