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2ddf992179
linux_dsm_epyc7002/drivers/gpu/drm/i915/gt
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Tomasz Lis 2ddf992179 drm/i915/tgl: Define MOCS entries for Tigerlake 
The MOCS table is published as part of bspec, and versioned. Entries
are supposed to never be modified, but new ones can be added. Adding
entries increases table version. The patch includes version 1 entries.

Two of the 3 legacy entries used for gen9 are no longer expected to work.
Although we are changing the gen11 table, those changes are supposed to
be backward compatible since we are only touching previously undefined
entries.

v2: Add the missing entries in 49-51 range and replace "HW reserved"
    terminology to what it actually is: L1 is implicitly enabled
    (from Daniele)
v3: Use a different table for Tiger Lake since entries 0 and 1 are not
    the same (from Daniele)

Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Tomasz Lis <tomasz.lis@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190730180407.5993-4-lucas.demarchi@intel.com
2019-07-31 07:40:31 -07:00
..
selftests drm/i915: Rename i915_timeline to intel_timeline and move under gt 2019-06-21 13:48:53 +01:00
uc drm/i915/uc: Move uC WOPCM setup in uc_init_hw 2019-07-31 10:19:28 +01:00
gen6_renderstate.c drm/i915: Move the renderstate setup under gt/ 2019-07-04 11:48:22 +01:00
gen7_renderstate.c drm/i915: Move the renderstate setup under gt/ 2019-07-04 11:48:22 +01:00
gen8_renderstate.c drm/i915: Move the renderstate setup under gt/ 2019-07-04 11:48:22 +01:00
gen9_renderstate.c drm/i915: Move the renderstate setup under gt/ 2019-07-04 11:48:22 +01:00
intel_breadcrumbs.c
intel_context_types.h drm/i915/gt: Provide a local intel_context.vm 2019-07-30 16:09:35 +01:00
intel_context.c drm/i915/gt: Provide a local intel_context.vm 2019-07-30 16:09:35 +01:00
intel_context.h drm/i915/gt: Hook up intel_context_fini() 2019-07-22 23:20:07 +01:00
intel_engine_cs.c drm/i915: Fix and improve MCR selection logic 2019-07-19 15:35:19 +01:00
intel_engine_pm.c drm/i915/gt: Use intel_gt as the primary object for handling resets 2019-07-12 21:06:56 +01:00
intel_engine_pm.h drm/i915: Lift intel_engines_resume() to callers 2019-06-26 18:01:01 +01:00
intel_engine_types.h drm/i915: Inline engine->init_context into its caller 2019-07-30 11:50:42 +01:00
intel_engine.h drm/i915/gt: Use intel_gt as the primary object for handling resets 2019-07-12 21:06:56 +01:00
intel_gpu_commands.h drm/i915/selftests: Ensure we don't clamp a random offset to 32b 2019-07-11 10:06:37 +01:00
intel_gt_pm.c drm/i915/uc: Sanitize uC when GT is sanitized 2019-07-23 11:38:23 +01:00
intel_gt_pm.h drm/i915: Lift intel_engines_resume() to callers 2019-06-26 18:01:01 +01:00
intel_gt_types.h drm/i915/guc: prefer intel_gt in guc interrupt functions 2019-07-13 20:11:36 +01:00
intel_gt.c drm/i915/tgl: Move fault registers to their new offset 2019-07-31 07:40:29 -07:00
intel_gt.h drm/i915/uc: prefer intel_gt over i915 in GuC/HuC paths 2019-07-13 20:08:44 +01:00
intel_hangcheck.c drm/i915/gt: Use intel_gt as the primary object for handling resets 2019-07-12 21:06:56 +01:00
intel_lrc_reg.h
intel_lrc.c drm/i915/gt: Provide a local intel_context.vm 2019-07-30 16:09:35 +01:00
intel_lrc.h
intel_mocs.c drm/i915/tgl: Define MOCS entries for Tigerlake 2019-07-31 07:40:31 -07:00
intel_mocs.h drm/i915: remove dangling forward declaration 2019-07-31 07:40:10 -07:00
intel_renderstate.c drm/i915: Inline engine->init_context into its caller 2019-07-30 11:50:42 +01:00
intel_renderstate.h drm/i915: Move the renderstate setup under gt/ 2019-07-04 11:48:22 +01:00
intel_reset_types.h drm/i915/gt: Use intel_gt as the primary object for handling resets 2019-07-12 21:06:56 +01:00
intel_reset.c drm/i915/uc: Unify uC platform check 2019-07-25 07:30:41 +01:00
intel_reset.h drm/i915/gt: Use intel_gt as the primary object for handling resets 2019-07-12 21:06:56 +01:00
intel_ringbuffer.c drm/i915/gt: Provide a local intel_context.vm 2019-07-30 16:09:35 +01:00
intel_sseu.c
intel_sseu.h
intel_timeline_types.h drm/i915: Rename i915_timeline to intel_timeline and move under gt 2019-06-21 13:48:53 +01:00
intel_timeline.c drm/i915/gt: Always call kref_init for the timeline 2019-06-26 07:25:54 +01:00
intel_timeline.h drm/i915: Rename i915_timeline to intel_timeline and move under gt 2019-06-21 13:48:53 +01:00
intel_workarounds_types.h drm/i915: Add engine name to workaround debug print 2019-07-12 09:55:30 +01:00
intel_workarounds.c drm/i915/icl: Add Wa_1409178092 2019-07-19 15:35:21 +01:00
intel_workarounds.h drm/i915: Convert gt workarounds to intel_gt 2019-06-21 13:48:25 +01:00
Makefile drm/i915: use upstream version of header tests 2019-07-30 12:11:57 +03:00
mock_engine.c drm/i915/gt: Hook up intel_context_fini() 2019-07-22 23:20:07 +01:00
mock_engine.h
selftest_engine_cs.c
selftest_hangcheck.c drm/i915/selftests: Careful not to flush hang_fini on error setups 2019-07-29 11:00:18 +01:00
selftest_lrc.c drm/i915/selftests: Pass intel_context to igt_spinner 2019-07-31 09:45:27 +01:00
selftest_reset.c drm/i915/gt: Use intel_gt as the primary object for handling resets 2019-07-12 21:06:56 +01:00
selftest_timeline.c drm/i915/gt: Use intel_gt as the primary object for handling resets 2019-07-12 21:06:56 +01:00
selftest_workarounds.c drm/i915/selftests: Pass intel_context to igt_spinner 2019-07-31 09:45:27 +01:00