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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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0123518081
This patch adds an implementation for a G3/G4 MMU, so we can run G3 and G4 guests in KVM on Book3s_64. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
373 lines
8.9 KiB
C
373 lines
8.9 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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* Copyright SUSE Linux Products GmbH 2009
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*
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* Authors: Alexander Graf <agraf@suse.de>
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*/
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#include <linux/types.h>
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#include <linux/string.h>
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#include <linux/kvm.h>
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#include <linux/kvm_host.h>
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#include <linux/highmem.h>
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#include <asm/tlbflush.h>
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#include <asm/kvm_ppc.h>
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#include <asm/kvm_book3s.h>
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/* #define DEBUG_MMU */
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/* #define DEBUG_MMU_PTE */
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/* #define DEBUG_MMU_PTE_IP 0xfff14c40 */
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#ifdef DEBUG_MMU
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#define dprintk(X...) printk(KERN_INFO X)
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#else
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#define dprintk(X...) do { } while(0)
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#endif
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#ifdef DEBUG_PTE
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#define dprintk_pte(X...) printk(KERN_INFO X)
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#else
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#define dprintk_pte(X...) do { } while(0)
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#endif
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#define PTEG_FLAG_ACCESSED 0x00000100
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#define PTEG_FLAG_DIRTY 0x00000080
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static inline bool check_debug_ip(struct kvm_vcpu *vcpu)
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{
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#ifdef DEBUG_MMU_PTE_IP
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return vcpu->arch.pc == DEBUG_MMU_PTE_IP;
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#else
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return true;
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#endif
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}
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static int kvmppc_mmu_book3s_32_xlate_bat(struct kvm_vcpu *vcpu, gva_t eaddr,
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struct kvmppc_pte *pte, bool data);
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static struct kvmppc_sr *find_sr(struct kvmppc_vcpu_book3s *vcpu_book3s, gva_t eaddr)
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{
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return &vcpu_book3s->sr[(eaddr >> 28) & 0xf];
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}
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static u64 kvmppc_mmu_book3s_32_ea_to_vp(struct kvm_vcpu *vcpu, gva_t eaddr,
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bool data)
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{
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struct kvmppc_sr *sre = find_sr(to_book3s(vcpu), eaddr);
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struct kvmppc_pte pte;
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if (!kvmppc_mmu_book3s_32_xlate_bat(vcpu, eaddr, &pte, data))
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return pte.vpage;
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return (((u64)eaddr >> 12) & 0xffff) | (((u64)sre->vsid) << 16);
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}
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static void kvmppc_mmu_book3s_32_reset_msr(struct kvm_vcpu *vcpu)
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{
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kvmppc_set_msr(vcpu, 0);
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}
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static hva_t kvmppc_mmu_book3s_32_get_pteg(struct kvmppc_vcpu_book3s *vcpu_book3s,
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struct kvmppc_sr *sre, gva_t eaddr,
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bool primary)
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{
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u32 page, hash, pteg, htabmask;
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hva_t r;
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page = (eaddr & 0x0FFFFFFF) >> 12;
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htabmask = ((vcpu_book3s->sdr1 & 0x1FF) << 16) | 0xFFC0;
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hash = ((sre->vsid ^ page) << 6);
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if (!primary)
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hash = ~hash;
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hash &= htabmask;
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pteg = (vcpu_book3s->sdr1 & 0xffff0000) | hash;
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dprintk("MMU: pc=0x%lx eaddr=0x%lx sdr1=0x%llx pteg=0x%x vsid=0x%x\n",
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vcpu_book3s->vcpu.arch.pc, eaddr, vcpu_book3s->sdr1, pteg,
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sre->vsid);
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r = gfn_to_hva(vcpu_book3s->vcpu.kvm, pteg >> PAGE_SHIFT);
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if (kvm_is_error_hva(r))
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return r;
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return r | (pteg & ~PAGE_MASK);
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}
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static u32 kvmppc_mmu_book3s_32_get_ptem(struct kvmppc_sr *sre, gva_t eaddr,
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bool primary)
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{
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return ((eaddr & 0x0fffffff) >> 22) | (sre->vsid << 7) |
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(primary ? 0 : 0x40) | 0x80000000;
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}
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static int kvmppc_mmu_book3s_32_xlate_bat(struct kvm_vcpu *vcpu, gva_t eaddr,
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struct kvmppc_pte *pte, bool data)
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{
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struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
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struct kvmppc_bat *bat;
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int i;
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for (i = 0; i < 8; i++) {
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if (data)
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bat = &vcpu_book3s->dbat[i];
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else
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bat = &vcpu_book3s->ibat[i];
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if (vcpu->arch.msr & MSR_PR) {
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if (!bat->vp)
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continue;
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} else {
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if (!bat->vs)
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continue;
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}
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if (check_debug_ip(vcpu))
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{
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dprintk_pte("%cBAT %02d: 0x%lx - 0x%x (0x%x)\n",
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data ? 'd' : 'i', i, eaddr, bat->bepi,
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bat->bepi_mask);
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}
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if ((eaddr & bat->bepi_mask) == bat->bepi) {
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pte->raddr = bat->brpn | (eaddr & ~bat->bepi_mask);
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pte->vpage = (eaddr >> 12) | VSID_BAT;
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pte->may_read = bat->pp;
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pte->may_write = bat->pp > 1;
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pte->may_execute = true;
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if (!pte->may_read) {
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printk(KERN_INFO "BAT is not readable!\n");
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continue;
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}
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if (!pte->may_write) {
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/* let's treat r/o BATs as not-readable for now */
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dprintk_pte("BAT is read-only!\n");
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continue;
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}
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return 0;
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}
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}
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return -ENOENT;
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}
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static int kvmppc_mmu_book3s_32_xlate_pte(struct kvm_vcpu *vcpu, gva_t eaddr,
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struct kvmppc_pte *pte, bool data,
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bool primary)
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{
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struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
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struct kvmppc_sr *sre;
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hva_t ptegp;
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u32 pteg[16];
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u64 ptem = 0;
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int i;
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int found = 0;
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sre = find_sr(vcpu_book3s, eaddr);
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dprintk_pte("SR 0x%lx: vsid=0x%x, raw=0x%x\n", eaddr >> 28,
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sre->vsid, sre->raw);
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pte->vpage = kvmppc_mmu_book3s_32_ea_to_vp(vcpu, eaddr, data);
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ptegp = kvmppc_mmu_book3s_32_get_pteg(vcpu_book3s, sre, eaddr, primary);
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if (kvm_is_error_hva(ptegp)) {
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printk(KERN_INFO "KVM: Invalid PTEG!\n");
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goto no_page_found;
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}
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ptem = kvmppc_mmu_book3s_32_get_ptem(sre, eaddr, primary);
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if(copy_from_user(pteg, (void __user *)ptegp, sizeof(pteg))) {
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printk(KERN_ERR "KVM: Can't copy data from 0x%lx!\n", ptegp);
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goto no_page_found;
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}
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for (i=0; i<16; i+=2) {
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if (ptem == pteg[i]) {
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u8 pp;
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pte->raddr = (pteg[i+1] & ~(0xFFFULL)) | (eaddr & 0xFFF);
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pp = pteg[i+1] & 3;
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if ((sre->Kp && (vcpu->arch.msr & MSR_PR)) ||
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(sre->Ks && !(vcpu->arch.msr & MSR_PR)))
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pp |= 4;
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pte->may_write = false;
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pte->may_read = false;
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pte->may_execute = true;
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switch (pp) {
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case 0:
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case 1:
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case 2:
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case 6:
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pte->may_write = true;
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case 3:
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case 5:
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case 7:
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pte->may_read = true;
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break;
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}
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if ( !pte->may_read )
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continue;
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dprintk_pte("MMU: Found PTE -> %x %x - %x\n",
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pteg[i], pteg[i+1], pp);
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found = 1;
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break;
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}
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}
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/* Update PTE C and A bits, so the guest's swapper knows we used the
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page */
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if (found) {
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u32 oldpte = pteg[i+1];
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if (pte->may_read)
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pteg[i+1] |= PTEG_FLAG_ACCESSED;
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if (pte->may_write)
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pteg[i+1] |= PTEG_FLAG_DIRTY;
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else
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dprintk_pte("KVM: Mapping read-only page!\n");
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/* Write back into the PTEG */
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if (pteg[i+1] != oldpte)
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copy_to_user((void __user *)ptegp, pteg, sizeof(pteg));
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return 0;
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}
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no_page_found:
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if (check_debug_ip(vcpu)) {
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dprintk_pte("KVM MMU: No PTE found (sdr1=0x%llx ptegp=0x%lx)\n",
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to_book3s(vcpu)->sdr1, ptegp);
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for (i=0; i<16; i+=2) {
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dprintk_pte(" %02d: 0x%x - 0x%x (0x%llx)\n",
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i, pteg[i], pteg[i+1], ptem);
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}
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}
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return -ENOENT;
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}
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static int kvmppc_mmu_book3s_32_xlate(struct kvm_vcpu *vcpu, gva_t eaddr,
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struct kvmppc_pte *pte, bool data)
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{
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int r;
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pte->eaddr = eaddr;
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r = kvmppc_mmu_book3s_32_xlate_bat(vcpu, eaddr, pte, data);
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if (r < 0)
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r = kvmppc_mmu_book3s_32_xlate_pte(vcpu, eaddr, pte, data, true);
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if (r < 0)
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r = kvmppc_mmu_book3s_32_xlate_pte(vcpu, eaddr, pte, data, false);
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return r;
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}
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static u32 kvmppc_mmu_book3s_32_mfsrin(struct kvm_vcpu *vcpu, u32 srnum)
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{
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return to_book3s(vcpu)->sr[srnum].raw;
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}
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static void kvmppc_mmu_book3s_32_mtsrin(struct kvm_vcpu *vcpu, u32 srnum,
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ulong value)
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{
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struct kvmppc_sr *sre;
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sre = &to_book3s(vcpu)->sr[srnum];
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/* Flush any left-over shadows from the previous SR */
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/* XXX Not necessary? */
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/* kvmppc_mmu_pte_flush(vcpu, ((u64)sre->vsid) << 28, 0xf0000000ULL); */
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/* And then put in the new SR */
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sre->raw = value;
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sre->vsid = (value & 0x0fffffff);
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sre->Ks = (value & 0x40000000) ? true : false;
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sre->Kp = (value & 0x20000000) ? true : false;
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sre->nx = (value & 0x10000000) ? true : false;
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/* Map the new segment */
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kvmppc_mmu_map_segment(vcpu, srnum << SID_SHIFT);
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}
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static void kvmppc_mmu_book3s_32_tlbie(struct kvm_vcpu *vcpu, ulong ea, bool large)
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{
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kvmppc_mmu_pte_flush(vcpu, ea, ~0xFFFULL);
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}
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static int kvmppc_mmu_book3s_32_esid_to_vsid(struct kvm_vcpu *vcpu, u64 esid,
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u64 *vsid)
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{
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/* In case we only have one of MSR_IR or MSR_DR set, let's put
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that in the real-mode context (and hope RM doesn't access
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high memory) */
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switch (vcpu->arch.msr & (MSR_DR|MSR_IR)) {
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case 0:
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*vsid = (VSID_REAL >> 16) | esid;
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break;
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case MSR_IR:
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*vsid = (VSID_REAL_IR >> 16) | esid;
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break;
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case MSR_DR:
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*vsid = (VSID_REAL_DR >> 16) | esid;
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break;
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case MSR_DR|MSR_IR:
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{
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ulong ea;
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ea = esid << SID_SHIFT;
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*vsid = find_sr(to_book3s(vcpu), ea)->vsid;
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break;
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}
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default:
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BUG();
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}
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return 0;
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}
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static bool kvmppc_mmu_book3s_32_is_dcbz32(struct kvm_vcpu *vcpu)
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{
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return true;
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}
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void kvmppc_mmu_book3s_32_init(struct kvm_vcpu *vcpu)
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{
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struct kvmppc_mmu *mmu = &vcpu->arch.mmu;
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mmu->mtsrin = kvmppc_mmu_book3s_32_mtsrin;
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mmu->mfsrin = kvmppc_mmu_book3s_32_mfsrin;
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mmu->xlate = kvmppc_mmu_book3s_32_xlate;
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mmu->reset_msr = kvmppc_mmu_book3s_32_reset_msr;
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mmu->tlbie = kvmppc_mmu_book3s_32_tlbie;
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mmu->esid_to_vsid = kvmppc_mmu_book3s_32_esid_to_vsid;
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mmu->ea_to_vp = kvmppc_mmu_book3s_32_ea_to_vp;
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mmu->is_dcbz32 = kvmppc_mmu_book3s_32_is_dcbz32;
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mmu->slbmte = NULL;
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mmu->slbmfee = NULL;
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mmu->slbmfev = NULL;
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mmu->slbie = NULL;
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mmu->slbia = NULL;
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}
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