Martin Blumenstingl a29ae8600d clk: meson: meson8b: Don't rely on u-boot to init all GP_PLL registers ... Not all u-boot versions initialize the HHI_GP_PLL_CNTL[2-5] registers. In that case all HHI_GPLL_PLL_CNTL[1-5] registers are 0x0 and when booting Linux the PLL fails to lock. The initialization sequence from u-boot is: - put the PLL into reset - write 0x59C88000 to HHI_GP_PLL_CNTL2 - write 0xCA463823 to HHI_GP_PLL_CNTL3 - write 0x0286A027 to HHI_GP_PLL_CNTL4 - write 0x00003000 to HHI_GP_PLL_CNTL5 - set M, N, OD and the enable bit - take the PLL out of reset - check if it has locked - disable the PLL In Linux we already initialize M, N, OD, the enable and the reset bits. Also the HHI_GP_PLL_CNTL[2-5] registers with these magic values (the exact meaning is unknown) so the PLL can lock when the vendor u-boot did not initialize these registers yet. Fixes: b882964b37 ("clk: meson: meson8b: add support for the GP_PLL clock on Meson8m2") Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/r/20200501215717.735393-1-martin.blumenstingl@googlemail.com		2020-05-02 01:53:32 +02:00
..
axg-aoclk.c
axg-aoclk.h
axg-audio.c
axg-audio.h
axg.c
axg.h
clk-cpu-dyndiv.c
clk-cpu-dyndiv.h
clk-dualdiv.c
clk-dualdiv.h
clk-mpll.c	clk: let init callback return an error code	2019-12-23 18:53:13 -08:00
clk-mpll.h
clk-phase.c	clk: let init callback return an error code	2019-12-23 18:53:13 -08:00
clk-phase.h
clk-pll.c	Merge branches 'clk-debugfs-danger', 'clk-basic-hw', 'clk-renesas', 'clk-amlogic' and 'clk-allwinner' into clk-next	2020-01-31 13:12:14 -08:00
clk-pll.h
clk-regmap.c
clk-regmap.h
g12a-aoclk.c
g12a-aoclk.h
g12a.c	clk: meson: g12a: Prepare the GPU clock tree to change at runtime	2020-04-16 12:23:05 +02:00
g12a.h	clk: meson: g12a: add support for the SPICC SCLK Source clocks	2020-02-19 18:41:27 +01:00
gxbb-aoclk.c
gxbb-aoclk.h
gxbb.c	clk: meson: gxbb: Prepare the GPU clock tree to change at runtime	2020-04-16 12:23:05 +02:00
gxbb.h	clk: meson: gxbb: add the gxl internal dac gate	2020-02-13 17:26:04 +01:00
Kconfig
Makefile
meson8-ddr.c
meson8b.c	clk: meson: meson8b: Don't rely on u-boot to init all GP_PLL registers	2020-05-02 01:53:32 +02:00
meson8b.h	clk: meson: meson8b: Don't rely on u-boot to init all GP_PLL registers	2020-05-02 01:53:32 +02:00
meson-aoclk.c
meson-aoclk.h
meson-eeclk.c
meson-eeclk.h
parm.h
sclk-div.c	clk: let init callback return an error code	2019-12-23 18:53:13 -08:00
sclk-div.h
vid-pll-div.c
vid-pll-div.h