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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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a0789993bf
Register default arch handler via driver instead of directly pointing to xilinx intc controller. This patch makes architecture code more generic. Driver calls generic domain specific irq handler which does the most of things self. Also get rid of concurrent_irq counting which hasn't been exported anywhere. Based on this loop was also optimized by using do/while loop instead of goto loop. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Stefan Asserhall <stefan.asserhall@xilinx.com> Link: https://lore.kernel.org/r/20200317125600.15913-4-mubin.usman.sayyed@xilinx.com
279 lines
7.5 KiB
Plaintext
279 lines
7.5 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
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config MICROBLAZE
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def_bool y
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select ARCH_32BIT_OFF_T
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select ARCH_NO_SWAP
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select ARCH_HAS_BINFMT_FLAT if !MMU
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select ARCH_HAS_DMA_PREP_COHERENT
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select ARCH_HAS_GCOV_PROFILE_ALL
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select ARCH_HAS_SYNC_DMA_FOR_CPU
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select ARCH_HAS_SYNC_DMA_FOR_DEVICE
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select ARCH_HAS_UNCACHED_SEGMENT if !MMU
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select ARCH_MIGHT_HAVE_PC_PARPORT
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select ARCH_WANT_IPC_PARSE_VERSION
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select BUILDTIME_TABLE_SORT
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select TIMER_OF
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select CLONE_BACKWARDS3
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select COMMON_CLK
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select DMA_DIRECT_REMAP if MMU
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select GENERIC_ATOMIC64
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select GENERIC_CLOCKEVENTS
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select GENERIC_CPU_DEVICES
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select GENERIC_IDLE_POLL_SETUP
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select GENERIC_IRQ_PROBE
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select GENERIC_IRQ_SHOW
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select GENERIC_PCI_IOMAP
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select GENERIC_SCHED_CLOCK
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select HAVE_ARCH_HASH
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select HAVE_ARCH_KGDB
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select HAVE_DEBUG_KMEMLEAK
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select HAVE_DMA_CONTIGUOUS
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select HAVE_DYNAMIC_FTRACE
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select HAVE_FTRACE_MCOUNT_RECORD
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select HAVE_FUNCTION_GRAPH_TRACER
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select HAVE_FUNCTION_TRACER
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select HAVE_MEMBLOCK_NODE_MAP
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select HAVE_OPROFILE
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select HAVE_PCI
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select IRQ_DOMAIN
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select XILINX_INTC
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select MODULES_USE_ELF_RELA
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select OF
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select OF_EARLY_FLATTREE
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select PCI_DOMAINS_GENERIC if PCI
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select PCI_SYSCALL if PCI
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select TRACING_SUPPORT
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select VIRT_TO_BUS
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select CPU_NO_EFFICIENT_FFS
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select MMU_GATHER_NO_RANGE if MMU
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select SPARSE_IRQ
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select GENERIC_IRQ_MULTI_HANDLER
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select HANDLE_DOMAIN_IRQ
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# Endianness selection
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choice
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prompt "Endianness selection"
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default CPU_LITTLE_ENDIAN
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help
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microblaze architectures can be configured for either little or
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big endian formats. Be sure to select the appropriate mode.
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config CPU_BIG_ENDIAN
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bool "Big endian"
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config CPU_LITTLE_ENDIAN
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bool "Little endian"
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endchoice
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config ZONE_DMA
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def_bool y
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config ARCH_HAS_ILOG2_U32
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def_bool n
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config ARCH_HAS_ILOG2_U64
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def_bool n
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config GENERIC_HWEIGHT
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def_bool y
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config GENERIC_CALIBRATE_DELAY
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def_bool y
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config GENERIC_CSUM
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def_bool y
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config STACKTRACE_SUPPORT
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def_bool y
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config LOCKDEP_SUPPORT
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def_bool y
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source "arch/microblaze/Kconfig.platform"
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menu "Processor type and features"
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source "kernel/Kconfig.hz"
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config MMU
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bool "MMU support"
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default n
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comment "Boot options"
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config CMDLINE_BOOL
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bool "Default bootloader kernel arguments"
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config CMDLINE
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string "Default kernel command string"
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depends on CMDLINE_BOOL
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default "console=ttyUL0,115200"
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help
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On some architectures there is currently no way for the boot loader
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to pass arguments to the kernel. For these architectures, you should
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supply some command-line options at build time by entering them
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here.
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config CMDLINE_FORCE
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bool "Force default kernel command string"
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depends on CMDLINE_BOOL
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default n
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help
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Set this to have arguments from the default kernel command string
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override those passed by the boot loader.
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config SECCOMP
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bool "Enable seccomp to safely compute untrusted bytecode"
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depends on PROC_FS
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default y
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help
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This kernel feature is useful for number crunching applications
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that may need to compute untrusted bytecode during their
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execution. By using pipes or other transports made available to
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the process as file descriptors supporting the read/write
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syscalls, it's possible to isolate those applications in
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their own address space using seccomp. Once seccomp is
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enabled via /proc/<pid>/seccomp, it cannot be disabled
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and the task is only allowed to execute a few safe syscalls
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defined by each seccomp mode.
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If unsure, say Y. Only embedded should say N here.
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endmenu
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menu "Kernel features"
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config NR_CPUS
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int
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default "1"
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config ADVANCED_OPTIONS
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bool "Prompt for advanced kernel configuration options"
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help
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This option will enable prompting for a variety of advanced kernel
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configuration options. These options can cause the kernel to not
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work if they are set incorrectly, but can be used to optimize certain
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aspects of kernel memory management.
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Unless you know what you are doing, say N here.
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comment "Default settings for advanced configuration options are used"
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depends on !ADVANCED_OPTIONS
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config XILINX_UNCACHED_SHADOW
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bool "Are you using uncached shadow for RAM ?"
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depends on ADVANCED_OPTIONS && !MMU
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default n
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help
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This is needed to be able to allocate uncachable memory regions.
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The feature requires the design to define the RAM memory controller
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window to be twice as large as the actual physical memory.
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config HIGHMEM
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bool "High memory support"
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depends on MMU
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help
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The address space of Microblaze processors is only 4 Gigabytes large
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and it has to accommodate user address space, kernel address
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space as well as some memory mapped IO. That means that, if you
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have a large amount of physical memory and/or IO, not all of the
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memory can be "permanently mapped" by the kernel. The physical
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memory that is not permanently mapped is called "high memory".
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If unsure, say n.
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config LOWMEM_SIZE_BOOL
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bool "Set maximum low memory"
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depends on ADVANCED_OPTIONS && MMU
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help
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This option allows you to set the maximum amount of memory which
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will be used as "low memory", that is, memory which the kernel can
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access directly, without having to set up a kernel virtual mapping.
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This can be useful in optimizing the layout of kernel virtual
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memory.
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Say N here unless you know what you are doing.
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config LOWMEM_SIZE
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hex "Maximum low memory size (in bytes)" if LOWMEM_SIZE_BOOL
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default "0x30000000"
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config MANUAL_RESET_VECTOR
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hex "Microblaze reset vector address setup"
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default "0x0"
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help
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Set this option to have the kernel override the CPU Reset vector.
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If zero, no change will be made to the MicroBlaze reset vector at
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address 0x0.
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If non-zero, a jump instruction to this address, will be written
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to the reset vector at address 0x0.
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If you are unsure, set it to default value 0x0.
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config KERNEL_START_BOOL
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bool "Set custom kernel base address"
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depends on ADVANCED_OPTIONS
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help
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This option allows you to set the kernel virtual address at which
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the kernel will map low memory (the kernel image will be linked at
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this address). This can be useful in optimizing the virtual memory
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layout of the system.
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Say N here unless you know what you are doing.
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config KERNEL_START
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hex "Virtual address of kernel base" if KERNEL_START_BOOL
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default "0xc0000000" if MMU
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default KERNEL_BASE_ADDR if !MMU
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config TASK_SIZE_BOOL
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bool "Set custom user task size"
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depends on ADVANCED_OPTIONS && MMU
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help
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This option allows you to set the amount of virtual address space
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allocated to user tasks. This can be useful in optimizing the
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virtual memory layout of the system.
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Say N here unless you know what you are doing.
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config TASK_SIZE
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hex "Size of user task space" if TASK_SIZE_BOOL
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default "0x80000000"
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choice
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prompt "Page size"
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default MICROBLAZE_4K_PAGES
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depends on ADVANCED_OPTIONS && !MMU
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help
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Select the kernel logical page size. Increasing the page size
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will reduce software overhead at each page boundary, allow
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hardware prefetch mechanisms to be more effective, and allow
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larger dma transfers increasing IO efficiency and reducing
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overhead. However the utilization of memory will increase.
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For example, each cached file will using a multiple of the
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page size to hold its contents and the difference between the
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end of file and the end of page is wasted.
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If unsure, choose 4K_PAGES.
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config MICROBLAZE_4K_PAGES
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bool "4k page size"
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config MICROBLAZE_16K_PAGES
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bool "16k page size"
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config MICROBLAZE_64K_PAGES
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bool "64k page size"
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endchoice
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endmenu
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menu "Bus Options"
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config PCI_XILINX
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bool "Xilinx PCI host bridge support"
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depends on PCI
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endmenu
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