linux_dsm_epyc7002/arch/arm/mach-tegra
Linus Torvalds d4f4cf77b3 Merge branch 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm
Pull ARM updates from Russell King:

 - nommu updates from Afzal Mohammed cleaning up the vectors support

 - allow DMA memory "mapping" for nommu Benjamin Gaignard

 - fixing a correctness issue with R_ARM_PREL31 relocations in the
   module linker

 - add strlen() prototype for the decompressor

 - support for DEBUG_VIRTUAL from Florian Fainelli

 - adjusting memory bounds after memory reservations have been
   registered

 - unipher cache handling updates from Masahiro Yamada

 - initrd and Thumb Kconfig cleanups

* 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm: (23 commits)
  ARM: mm: round the initrd reservation to page boundaries
  ARM: mm: clean up initrd initialisation
  ARM: mm: move initrd init code out of arm_memblock_init()
  ARM: 8655/1: improve NOMMU definition of pgprot_*()
  ARM: 8654/1: decompressor: add strlen prototype
  ARM: 8652/1: cache-uniphier: clean up active way setup code
  ARM: 8651/1: cache-uniphier: include <linux/errno.h> instead of <linux/types.h>
  ARM: 8650/1: module: handle negative R_ARM_PREL31 addends correctly
  ARM: 8649/2: nommu: remove Hivecs configuration is asm
  ARM: 8648/2: nommu: display vectors base
  ARM: 8647/2: nommu: dynamic exception base address setting
  ARM: 8646/1: mmu: decouple VECTORS_BASE from Kconfig
  ARM: 8644/1: Reduce "CPU: shutdown" message to debug level
  ARM: 8641/1: treewide: Replace uses of virt_to_phys with __pa_symbol
  ARM: 8640/1: Add support for CONFIG_DEBUG_VIRTUAL
  ARM: 8639/1: Define KERNEL_START and KERNEL_END
  ARM: 8638/1: mtd: lart: Rename partition defines to be prefixed with PART_
  ARM: 8637/1: Adjust memory boundaries after reservations
  ARM: 8636/1: Cleanup sanity_check_meminfo
  ARM: add CPU_THUMB_CAPABLE to indicate possible Thumb support
  ...
2017-02-28 11:50:53 -08:00
..
board-paz00.c ARM: tegra: paz00: Fix __initdata placement 2017-01-25 09:09:32 +01:00
board.h ARM: tegra: Convert PMC to a driver 2014-07-17 14:58:43 +02:00
common.h ARM: tegra: hotplug: Include missing common.h 2016-06-10 16:17:58 +02:00
cpuidle-tegra20.c ARM: tegra: cpuidle: Add missing cpuidle.h include 2016-06-10 16:17:59 +02:00
cpuidle-tegra30.c ARM: tegra: cpuidle: Add missing cpuidle.h include 2016-06-10 16:17:59 +02:00
cpuidle-tegra114.c ARM: tegra: cpuidle: Add missing cpuidle.h include 2016-06-10 16:17:59 +02:00
cpuidle.c ARM: tegra: Use a function to get the chip ID 2014-07-17 13:36:41 +02:00
cpuidle.h ARM: tegra: cpuidle: Add missing cpuidle.h include 2016-06-10 16:17:59 +02:00
flowctrl.c ARM: tegra: Initialize flow controller from DT 2014-08-26 11:43:55 -06:00
flowctrl.h ARM: tegra: Initialize flow controller from DT 2014-08-26 11:43:55 -06:00
hotplug.c ARM: tegra: hotplug: Include missing common.h 2016-06-10 16:17:58 +02:00
io.c ARM: tegra: Sort includes alphabetically 2014-07-17 13:29:57 +02:00
iomap.h soc/tegra: fuse: Unify Tegra20 and Tegra30 drivers 2015-07-16 10:38:28 +02:00
irammap.h
irq.c ARM: tegra: irq: Add missing irq.h include 2016-06-10 16:18:00 +02:00
irq.h ARM: tegra: remove old LIC support 2015-03-15 00:40:52 +00:00
Kconfig ARM: do away with ARCH_[WANT_OPTIONAL|REQUIRE]_GPIOLIB 2016-06-03 12:18:13 -07:00
Makefile ARM: v7 setup function should invalidate L1 cache 2015-06-01 11:30:26 +01:00
platsmp.c soc/tegra: pmc: Wait for powergate state to change 2016-04-05 15:22:53 +02:00
pm-tegra20.c ARM: tegra: Sort includes alphabetically 2014-07-17 13:29:57 +02:00
pm-tegra30.c ARM: tegra: Sort includes alphabetically 2014-07-17 13:29:57 +02:00
pm.c ARM: tegra: Convert PMC to a driver 2014-07-17 14:58:43 +02:00
pm.h ARM: tegra: pm: Add tegra_cpu_do_idle() prototype 2016-06-10 16:18:01 +02:00
reset-handler.S ARM: tegra20: Store CPU "resettable" status in IRAM 2015-05-04 12:58:19 +02:00
reset.c ARM: 8641/1: treewide: Replace uses of virt_to_phys with __pa_symbol 2017-02-28 11:06:10 +00:00
reset.h ARM: SoC: platform support for v4.2 2015-06-26 11:34:35 -07:00
sleep-tegra20.S ARM: tegra: Ensure entire dcache is flushed on entering LP0/1 2015-11-24 16:47:26 +01:00
sleep-tegra30.S ARM: tegra: Ensure entire dcache is flushed on entering LP0/1 2015-11-24 16:47:26 +01:00
sleep.h ARM: tegra20: Store CPU "resettable" status in IRAM 2015-05-04 12:58:19 +02:00
sleep.S ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+ 2014-07-18 12:29:04 +01:00
tegra.c ARM: SoC cleanups for v4.8 2016-08-01 18:21:13 -04:00