mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-19 01:07:09 +07:00
06dda9d770
This patch adds new, Common Clock Framework-based clock driver for Samsung S3C64xx SoCs. The driver is just added, without actually letting the platforms use it yet, since this requires more intermediate steps. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
78 lines
2.4 KiB
Plaintext
78 lines
2.4 KiB
Plaintext
* Samsung S3C64xx Clock Controller
|
|
|
|
The S3C64xx clock controller generates and supplies clock to various controllers
|
|
within the SoC. The clock binding described here is applicable to all SoCs in
|
|
the S3C64xx family.
|
|
|
|
Required Properties:
|
|
|
|
- compatible: should be one of the following.
|
|
- "samsung,s3c6400-clock" - controller compatible with S3C6400 SoC.
|
|
- "samsung,s3c6410-clock" - controller compatible with S3C6410 SoC.
|
|
|
|
- reg: physical base address of the controller and length of memory mapped
|
|
region.
|
|
|
|
- #clock-cells: should be 1.
|
|
|
|
Each clock is assigned an identifier and client nodes can use this identifier
|
|
to specify the clock which they consume. Some of the clocks are available only
|
|
on a particular S3C64xx SoC and this is specified where applicable.
|
|
|
|
All available clocks are defined as preprocessor macros in
|
|
dt-bindings/clock/samsung,s3c64xx-clock.h header and can be used in device
|
|
tree sources.
|
|
|
|
External clocks:
|
|
|
|
There are several clocks that are generated outside the SoC. It is expected
|
|
that they are defined using standard clock bindings with following
|
|
clock-output-names:
|
|
- "fin_pll" - PLL input clock (xtal/extclk) - required,
|
|
- "xusbxti" - USB xtal - required,
|
|
- "iiscdclk0" - I2S0 codec clock - optional,
|
|
- "iiscdclk1" - I2S1 codec clock - optional,
|
|
- "iiscdclk2" - I2S2 codec clock - optional,
|
|
- "pcmcdclk0" - PCM0 codec clock - optional,
|
|
- "pcmcdclk1" - PCM1 codec clock - optional, only S3C6410.
|
|
|
|
Example: Clock controller node:
|
|
|
|
clock: clock-controller@7e00f000 {
|
|
compatible = "samsung,s3c6410-clock";
|
|
reg = <0x7e00f000 0x1000>;
|
|
#clock-cells = <1>;
|
|
};
|
|
|
|
Example: Required external clocks:
|
|
|
|
fin_pll: clock-fin-pll {
|
|
compatible = "fixed-clock";
|
|
clock-output-names = "fin_pll";
|
|
clock-frequency = <12000000>;
|
|
#clock-cells = <0>;
|
|
};
|
|
|
|
xusbxti: clock-xusbxti {
|
|
compatible = "fixed-clock";
|
|
clock-output-names = "xusbxti";
|
|
clock-frequency = <48000000>;
|
|
#clock-cells = <0>;
|
|
};
|
|
|
|
Example: UART controller node that consumes the clock generated by the clock
|
|
controller (refer to the standard clock bindings for information about
|
|
"clocks" and "clock-names" properties):
|
|
|
|
uart0: serial@7f005000 {
|
|
compatible = "samsung,s3c6400-uart";
|
|
reg = <0x7f005000 0x100>;
|
|
interrupt-parent = <&vic1>;
|
|
interrupts = <5>;
|
|
clock-names = "uart", "clk_uart_baud2",
|
|
"clk_uart_baud3";
|
|
clocks = <&clock PCLK_UART0>, <&clocks PCLK_UART0>,
|
|
<&clock SCLK_UART>;
|
|
status = "disabled";
|
|
};
|